We are using the following hardware:
- ADC9467 Eval board:
- Software: Xilinx SDK 2018.2
- Version: NO_OS (2018_R1)
AD9467-FMC-EBZ Reference Design: https://github.com/analogdevicesinc/no-OS/tree/2018_R1/ad9467-fmc-ebz
Here is the hardware block design we generated using Vivado 2018.2
Plz verify the block design if there are any issues with it.
We exported the design to software and are trying to run the full test (ad9467_fmc_ebz.c)
This is what we are expecting to achieve the full test functionality.
Here are the issues. As soon as we define Zynq as our platform, all the parameters liek XSPIPS_CR_OFFSET, XSPIPS_CR_SSCTRL_MASK etc are undefined.
Why is the software broken when we are using all the files from the same link https://github.com/analogdevicesinc/no-OS/tree/2018_R1/ad9467-fmc-ebz
Until we can find the answer to SPI read/ write functions working properly, we cannot proceed with the test successfully.
Plz help ASAP