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ADRV9364 CMOS dig_tune_delay: Tuning RX FAILED Problem

Category: Software
Software Version: HDL = 2021_r1, No-Os = 2021_r1

Hello,

I have 2 different ADRV9364-z7020 and ADRV1CRR-BOB carier boards. I built HDL (2021_r1) and No-Os (2021_r1) projects without any problem. In LVDS project everything works well but if I switch to CMOS project I get the error message attached to this message. Could you please help me ?

ad9361_reset: by GPIO
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_setup
ad9361_auxdac_setup
ad9361_auxdac_set DAC1 = 0 mV
ad9361_auxdac_set DAC2 = 0 mV
ad9361_gpo_setup
ad9361_set_dcxo_tune : coarse 8 fine 5920
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 983040000 245760000 122880000 61440000 30720000 3072                                                                                                                                                             0000
ad9361_set_trx_clock_chain: 983040000 122880000 122880000 61440000 30720000 3072                                                                                                                                                             0000
ad9361_bbpll_set_rate: Rate 983040000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 245760000 Hz Parent Rate 983040000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 122880000 Hz Parent Rate 245760000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 122880000 Hz Parent Rate 122880000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 30720000 Hz Parent Rate 30720000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 30720000 Hz Parent Rate 30720000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
ad9361_rf_port_setup : INPUT_SELECT 0x3
ad9361_pp_port_setup
ad9361_auxadc_setup
ad9361_ctrl_outs_setup
ad9361_set_ref_clk_cycles : ref_clk_hz 40000000
ad9361_clk_factor_set_rate: Rate 80000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 80000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 0
ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 1
ad9361_rfpll_int_round_rate: Rate 1200000000 Hz
ad9361_rfpll_int_set_rate: RX Rate 1200000000 Hz Parent Rate 80000000 Hz
ad9361_fastlock_prepare: RX Profile 0: Un-Prepare
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_load_gt: frequency 2400000000
ad9361_load_gt: frequency 2400000000 (band 1)
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_round_rate: Rate 1200000000 Hz
ad9361_rfpll_int_set_rate: TX Rate 1200000000 Hz Parent Rate 80000000 Hz
ad9361_fastlock_prepare: TX Profile 0: Un-Prepare
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_mux_set_parent: index 0
Nothing to do, device is already in 5 state
ad9361_trx_ext_lo_control : RX state 0
ad9361_clk_mux_set_parent: index 0
Nothing to do, device is already in 5 state
ad9361_trx_ext_lo_control : TX state 0
ad9361_load_mixer_gm_subtable
ad9361_gc_setup
ad9361_rx_bb_analog_filter_calib : rx_bb_bw 9000000 bbpll_freq 983040000
ad9361_run_calibration: CAL Mask 0x80
ad9361_tx_bb_analog_filter_calib : tx_bb_bw 9000000 bbpll_freq 983040000
ad9361_run_calibration: CAL Mask 0x40
ad9361_rx_tia_calib : bb_bw_Hz 9000000
ad9361_tx_bb_second_filter_calib : tx_bb_bw 9000000
ad9361_rx_adc_setup : BBBW 8606895 : ADCfreq 245760000
c3_msb 0x0 : c3_lsb 0x37 : r2346 0x1 :
invrc_tconst_1e6 955991, sqrt_inv_rc_tconst_1e3 977
scaled_adc_clk_1e6 384000, inv_scaled_adc_clk_1e3 2604
tmp_1e3 1000, sqrt_term_1e3 619, min_sqrt_term_1e3 1000
ad9361_bb_dc_offset_calib
ad9361_run_calibration: CAL Mask 0x1
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rf_dc_offset_calib : rx_freq 2400000000
ad9361_run_calibration: CAL Mask 0x2
ad9361_tx_quad_calib : bw_tx 9000000 clkrf 30720000 clktf 30720000
Tx NCO frequency: 1920000 (BW/4: 2250000) txnco_word 1
ad9361_run_calibration: CAL Mask 0x10
LO leakage: 1 Quadrature Calibration: 1 : rx_phase 26

ad9361_tracking_control : bbdc_track=1, rfdc_track=1, rxquad_track=1
ad9361_pp_port_setup
ad9361_set_tx_atten : attenuation 10000 mdB tx1=1 tx2=0
ad9361_set_tx_atten : attenuation 89750 mdB tx1=0 tx2=1
ad9361_rssi_setup
ad9361_txmon_setup
Device is in 5 state, moving to a
cf-ad9361-lpc: Successfully initialized (30718994 Hz)
ad9361_dig_tune: freq 61440000 flags 0x0

ad9361_set_tx_atten : attenuation 89750 mdB tx1=1 tx2=1
ad9361_bist_loopback: mode 0
ad9361_bist_prbs: mode 2
ad9361_calculate_rf_clock_chain: requested rate 25000000 TXFIR int 1 RXFIR dec 1                                                                                                                                                              mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 800000000 200000000 100000000 50000000 25000000 2500                                                                                                                                                             0000
ad9361_set_trx_clock_chain: 800000000 200000000 100000000 50000000 25000000 2500                                                                                                                                                             0000
ad9361_bbpll_set_rate: Rate 800000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 200000000 Hz Parent Rate 200000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 100000000 Hz Parent Rate 200000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
ad9361_calculate_rf_clock_chain: requested rate 40000000 TXFIR int 1 RXFIR dec 1                                                                                                                                                              mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 1280000000 320000000 160000000 80000000 40000000 400                                                                                                                                                             00000
ad9361_set_trx_clock_chain: 1280000000 320000000 160000000 80000000 40000000 400                                                                                                                                                             00000
ad9361_bbpll_set_rate: Rate 1280000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
ad9361_calculate_rf_clock_chain: requested rate 61440000 TXFIR int 1 RXFIR dec 1                                                                                                                                                              mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 983040000 491520000 245760000 122880000 61440000 614                                                                                                                                                             40000
ad9361_set_trx_clock_chain: 983040000 245760000 122880000 61440000 61440000 6144                                                                                                                                                             0000
ad9361_bbpll_set_rate: Rate 983040000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 491520000 Hz Parent Rate 983040000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 245760000 Hz Parent Rate 491520000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 61440000 Hz Parent Rate 61440000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
SAMPL CLK: 61440000 tuning: RX
  0:1:2:3:4:5:6:7:8:9:a:b:c:d:e:f:
0:# # # # # # # # # # # # # # # #
1:# # # # # # # # # # # # # # # #
ad9361_dig_tune_delay: Tuning RX FAILED!
ad9361_bist_loopback: mode 0
Device is in a state, forcing to 5
ad9361_set_tx_atten : attenuation 10000 mdB tx1=1 tx2=0
ad9361_set_tx_atten : attenuation 89750 mdB tx1=0 tx2=1
ad9361_init : AD936x initialization error
ad9361_load_fir_filter_coef: TAPS 64, gain -6, dest 3
ad9361_reset: by GPIO
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_setup
ad9361_auxdac_setup
ad9361_auxdac_set DAC1 = 0 mV
ad9361_auxdac_set DAC2 = 0 mV
ad9361_gpo_setup
ad9361_set_dcxo_tune : coarse 8 fine 5920
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 983040000 245760000 122880000 61440000 30720000 30720000
ad9361_set_trx_clock_chain: 983040000 122880000 122880000 61440000 30720000 30720000
ad9361_bbpll_set_rate: Rate 983040000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 245760000 Hz Parent Rate 983040000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 122880000 Hz Parent Rate 245760000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 122880000 Hz Parent Rate 122880000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 30720000 Hz Parent Rate 30720000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 30720000 Hz Parent Rate 30720000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
ad9361_rf_port_setup : INPUT_SELECT 0x3
ad9361_pp_port_setup
ad9361_auxadc_setup
ad9361_ctrl_outs_setup
ad9361_set_ref_clk_cycles : ref_clk_hz 40000000
ad9361_clk_factor_set_rate: Rate 80000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 80000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 0
ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 1
ad9361_rfpll_int_round_rate: Rate 1200000000 Hz
ad9361_rfpll_int_set_rate: RX Rate 1200000000 Hz Parent Rate 80000000 Hz
ad9361_fastlock_prepare: RX Profile 0: Un-Prepare
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_load_gt: frequency 2400000000
ad9361_load_gt: frequency 2400000000 (band 1)
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_round_rate: Rate 1200000000 Hz
ad9361_rfpll_int_set_rate: TX Rate 1200000000 Hz Parent Rate 80000000 Hz
ad9361_fastlock_prepare: TX Profile 0: Un-Prepare
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_mux_set_parent: index 0
Nothing to do, device is already in 5 state
ad9361_trx_ext_lo_control : RX state 0
ad9361_clk_mux_set_parent: index 0
Nothing to do, device is already in 5 state
ad9361_trx_ext_lo_control : TX state 0
ad9361_load_mixer_gm_subtable
ad9361_gc_setup
ad9361_rx_bb_analog_filter_calib : rx_bb_bw 9000000 bbpll_freq 983040000
ad9361_run_calibration: CAL Mask 0x80
ad9361_tx_bb_analog_filter_calib : tx_bb_bw 9000000 bbpll_freq 983040000
ad9361_run_calibration: CAL Mask 0x40
ad9361_rx_tia_calib : bb_bw_Hz 9000000
ad9361_tx_bb_second_filter_calib : tx_bb_bw 9000000
ad9361_rx_adc_setup : BBBW 8606895 : ADCfreq 245760000
c3_msb 0x0 : c3_lsb 0x38 : r2346 0x1 :
invrc_tconst_1e6 969846, sqrt_inv_rc_tconst_1e3 984
scaled_adc_clk_1e6 384000, inv_scaled_adc_clk_1e3 2604
tmp_1e3 1000, sqrt_term_1e3 619, min_sqrt_term_1e3 1000
ad9361_bb_dc_offset_calib
ad9361_run_calibration: CAL Mask 0x1
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rf_dc_offset_calib : rx_freq 2400000000
ad9361_run_calibration: CAL Mask 0x2
ad9361_tx_quad_calib : bw_tx 9000000 clkrf 30720000 clktf 30720000
Tx NCO frequency: 1920000 (BW/4: 2250000) txnco_word 1
ad9361_run_calibration: CAL Mask 0x10
LO leakage: 1 Quadrature Calibration: 1 : rx_phase 26

ad9361_tracking_control : bbdc_track=1, rfdc_track=1, rxquad_track=1
ad9361_pp_port_setup
ad9361_set_tx_atten : attenuation 40000 mdB tx1=1 tx2=0
ad9361_set_tx_atten : attenuation 89750 mdB tx1=0 tx2=1
ad9361_rssi_setup
ad9361_txmon_setup
Device is in 5 state, moving to a
cf-ad9361-lpc: Successfully initialized (30718994 Hz)
ad9361_dig_tune: freq 61440000 flags 0x0

ad9361_set_tx_atten : attenuation 89750 mdB tx1=1 tx2=1
ad9361_bist_loopback: mode 0
ad9361_bist_prbs: mode 2
ad9361_calculate_rf_clock_chain: requested rate 25000000 TXFIR int 1 RXFIR dec 1 mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 800000000 200000000 100000000 50000000 25000000 25000000
ad9361_set_trx_clock_chain: 800000000 200000000 100000000 50000000 25000000 25000000
ad9361_bbpll_set_rate: Rate 800000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 200000000 Hz Parent Rate 200000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 100000000 Hz Parent Rate 200000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
ad9361_calculate_rf_clock_chain: requested rate 40000000 TXFIR int 1 RXFIR dec 1 mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 1280000000 320000000 160000000 80000000 40000000 40000000
ad9361_set_trx_clock_chain: 1280000000 320000000 160000000 80000000 40000000 40000000
ad9361_bbpll_set_rate: Rate 1280000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
ad9361_calculate_rf_clock_chain: requested rate 61440000 TXFIR int 1 RXFIR dec 1 mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 983040000 491520000 245760000 122880000 61440000 61440000
ad9361_set_trx_clock_chain: 983040000 245760000 122880000 61440000 61440000 61440000
ad9361_bbpll_set_rate: Rate 983040000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 491520000 Hz Parent Rate 983040000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 245760000 Hz Parent Rate 491520000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 61440000 Hz Parent Rate 61440000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
SAMPL CLK: 61440000 tuning: RX
  0:1:2:3:4:5:6:7:8:9:a:b:c:d:e:f:
0:# # # # # # # # # # # # # # # #
1:# # # # # # # # # # # # # # # #
ad9361_dig_tune_delay: Tuning RX FAILED!
ad9361_bist_loopback: mode 0
Device is in a state, forcing to 5
ad9361_set_tx_atten : attenuation 40000 mdB tx1=1 tx2=0
ad9361_set_tx_atten : attenuation 89750 mdB tx1=0 tx2=1
ad9361_init : AD936x initialization error
ad9361_load_fir_filter_coef: TAPS 64, gain -6, dest 3
ad9361_reset: by GPIO
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_setup
ad9361_auxdac_setup
ad9361_auxdac_set DAC1 = 0 mV
ad9361_auxdac_set DAC2 = 0 mV
ad9361_gpo_setup
ad9361_set_dcxo_tune : coarse 8 fine 5920
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 983040000 245760000 122880000 61440000 30720000 30720000
ad9361_set_trx_clock_chain: 983040000 122880000 122880000 61440000 30720000 30720000
ad9361_bbpll_set_rate: Rate 983040000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 245760000 Hz Parent Rate 983040000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 122880000 Hz Parent Rate 245760000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 122880000 Hz Parent Rate 122880000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 30720000 Hz Parent Rate 30720000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 30720000 Hz Parent Rate 30720000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
ad9361_rf_port_setup : INPUT_SELECT 0x3
ad9361_pp_port_setup
ad9361_auxadc_setup
ad9361_ctrl_outs_setup
ad9361_set_ref_clk_cycles : ref_clk_hz 40000000
ad9361_clk_factor_set_rate: Rate 80000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 40000000 Hz
ad9361_clk_factor_set_rate: Rate 80000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 0
ad9361_txrx_synth_cp_calib : ref_clk_hz 80000000 : is_tx 1
ad9361_rfpll_int_round_rate: Rate 1200000000 Hz
ad9361_rfpll_int_set_rate: RX Rate 1200000000 Hz Parent Rate 80000000 Hz
ad9361_fastlock_prepare: RX Profile 0: Un-Prepare
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_load_gt: frequency 2400000000
ad9361_load_gt: frequency 2400000000 (band 1)
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_round_rate: Rate 1200000000 Hz
ad9361_rfpll_int_set_rate: TX Rate 1200000000 Hz Parent Rate 80000000 Hz
ad9361_fastlock_prepare: TX Profile 0: Un-Prepare
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_rfpll_vco_init : vco_freq 9600000000 : ref_clk 80000000 : range 2
ad9361_rfpll_vco_init : freq 9445 MHz : index 12
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_mux_set_parent: index 0
Nothing to do, device is already in 5 state
ad9361_trx_ext_lo_control : RX state 0
ad9361_clk_mux_set_parent: index 0
Nothing to do, device is already in 5 state
ad9361_trx_ext_lo_control : TX state 0
ad9361_load_mixer_gm_subtable
ad9361_gc_setup
ad9361_rx_bb_analog_filter_calib : rx_bb_bw 9000000 bbpll_freq 983040000
ad9361_run_calibration: CAL Mask 0x80
ad9361_tx_bb_analog_filter_calib : tx_bb_bw 9000000 bbpll_freq 983040000
ad9361_run_calibration: CAL Mask 0x40
ad9361_rx_tia_calib : bb_bw_Hz 9000000
ad9361_tx_bb_second_filter_calib : tx_bb_bw 9000000
ad9361_rx_adc_setup : BBBW 8606895 : ADCfreq 245760000
c3_msb 0x0 : c3_lsb 0x38 : r2346 0x1 :
invrc_tconst_1e6 969846, sqrt_inv_rc_tconst_1e3 984
scaled_adc_clk_1e6 384000, inv_scaled_adc_clk_1e3 2604
tmp_1e3 1000, sqrt_term_1e3 619, min_sqrt_term_1e3 1000
ad9361_bb_dc_offset_calib
ad9361_run_calibration: CAL Mask 0x1
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rf_dc_offset_calib : rx_freq 2400000000
ad9361_run_calibration: CAL Mask 0x2
ad9361_tx_quad_calib : bw_tx 9000000 clkrf 30720000 clktf 30720000
Tx NCO frequency: 1920000 (BW/4: 2250000) txnco_word 1
ad9361_run_calibration: CAL Mask 0x10
LO leakage: 1 Quadrature Calibration: 1 : rx_phase 26

ad9361_tracking_control : bbdc_track=1, rfdc_track=1, rxquad_track=1
ad9361_pp_port_setup
ad9361_set_tx_atten : attenuation 40000 mdB tx1=1 tx2=0
ad9361_set_tx_atten : attenuation 89750 mdB tx1=0 tx2=1
ad9361_rssi_setup
ad9361_txmon_setup
Device is in 5 state, moving to a
cf-ad9361-lpc: Successfully initialized (30718994 Hz)
ad9361_dig_tune: freq 61440000 flags 0x0

ad9361_set_tx_atten : attenuation 89750 mdB tx1=1 tx2=1
ad9361_bist_loopback: mode 0
ad9361_bist_prbs: mode 2
ad9361_calculate_rf_clock_chain: requested rate 25000000 TXFIR int 1 RXFIR dec 1 mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 800000000 200000000 100000000 50000000 25000000 25000000
ad9361_set_trx_clock_chain: 800000000 200000000 100000000 50000000 25000000 25000000
ad9361_bbpll_set_rate: Rate 800000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 200000000 Hz Parent Rate 200000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 100000000 Hz Parent Rate 200000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
ad9361_calculate_rf_clock_chain: requested rate 40000000 TXFIR int 1 RXFIR dec 1 mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 1280000000 320000000 160000000 80000000 40000000 40000000
ad9361_set_trx_clock_chain: 1280000000 320000000 160000000 80000000 40000000 40000000
ad9361_bbpll_set_rate: Rate 1280000000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
ad9361_calculate_rf_clock_chain: requested rate 61440000 TXFIR int 1 RXFIR dec 1 mode Nominal
ad9361_set_trx_clock_chain
ad9361_set_trx_clock_chain: 983040000 491520000 245760000 122880000 61440000 61440000
ad9361_set_trx_clock_chain: 983040000 245760000 122880000 61440000 61440000 61440000
ad9361_bbpll_set_rate: Rate 983040000 Hz Parent Rate 40000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 491520000 Hz Parent Rate 983040000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 245760000 Hz Parent Rate 491520000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_clk_factor_set_rate: Rate 61440000 Hz Parent Rate 61440000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rfpll_int_recalc_rate: Parent Rate 80000000 Hz
ad9361_rssi_setup
ad9361_auxadc_setup
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
Device is in a state, forcing to 5
Device is in 5 state, forcing to a
SAMPL CLK: 61440000 tuning: RX
  0:1:2:3:4:5:6:7:8:9:a:b:c:d:e:f:
0:# # # # # # # # # # # # # # # #
1:# # # # # # # # # # # # # # # #
ad9361_dig_tune_delay: Tuning RX FAILED!
ad9361_bist_loopback: mode 0
Device is in a state, forcing to 5
ad9361_set_tx_atten : attenuation 40000 mdB tx1=1 tx2=0
ad9361_set_tx_atten : attenuation 89750 mdB tx1=0 tx2=1
ad9361_init : AD936x initialization error
ad9361_load_fir_filter_coef: TAPS 64, gain -6, dest 3

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