I have an AD9082-FMCA-EBZ evaluation board which a original boot SD card. I managed to run the evaluation setup by a Xilinx ZCU102 board, using the boot files in the SD card in folder "zynqmp-zcu102-rev10-ad9082-m4-l8-vcxo100". Note that the evaluation board has a 100MHz LO. I cloned the HDL reference design and built it as described here by this command:
make JESD_MODE=64B66B \
When I boot the board with the generated FPGA bit stream I get the following error message related to JESD configuration and the IIO doesn't work anymore.
[ 8.387594] axi-jesd204-rx 84a90000.axi-jesd204-rx: octets_per_frame * frames_per_multiframe must be a multiple of 256, got 32
[ 8.398975] axi-jesd204-rx 84a90000.axi-jesd204-rx: axi_jesd204_rx_jesd204_link_setup: Apply config Link2 failed (-22)
[ 8.409666] jesd204: /fpga-axi@0/axi-jesd204-rx@84a90000,jesd204:4,parent=84a90000.axi-jesd204-rx: JESD204 got error from cb: -22
I'm pretty sure that M, S and NP are correct but not sure about the reset. I need to know what exactly the make parameters should be to make the same bit file as already is embedded into the boot files in the SD card, folder "zynqmp-zcu102-rev10-ad9082-m4-l8-vcxo100".