Hi,
I am trying to integrate arria10 gx fpga with ad9361 (custom board).
In the given "hdl" github code, axi_ad9361_lvds_if_10.v calls "lvds serdes", which as per my understanding is not possible as per arria10 architecture.
Can you please help me out, about how I can make some modifications in "hdl", for above system to work?
Thanks and Regards,
Prince