We've been eyeing ADI's JESD framework at the GitHub repo as an alternative to Xilinx's framework to be implemented using an AD9083 + Zynq MPSoC.
We saw that the Pseudo Random sequences produced by the AD9083 used to verify the digital link differ from the ones implemented at the checker in the RX transport layer (PRBS7, PRBS15 and PRBS31 vs PRBS9 and PRBS23.
Is this OK? Is there something we might be missing regarding the use of these sequences?
Thanks a lot and regards