I have a problem similar to the "AD9361 1R1T mode issue" question, but with no-os firmware, microblaze processor and an application on a board of ours with an ARTIX-7 and the AD9364.
In this case I think there are not compatibility issues.
Anyway I have the dac_valid lines that go high once every 4 clock cycles, unlike the adc_valid lines that go high once every 2 clock cycles.
I'm non using DDS (parameter DAC DDS DISABLE = 1 in block diagram).
I'm using Vivado suite 2020.1.