I want to use VCU128 FPGA Evaluation Kit for capturing the data from AD9213 and transmitting data to AD9172 (part number: HTG-FMC-12ADC-16DAC). And I want to configure AD9213 in 12 lanes mode but I found that the ADC transport layer IP (JESD204 transport layer for ADCs) only has number lanes = [1; 2; 3; 4; 8; 16]. So how can I configure that IPs so that it can work with 12 lanes? and about the "octet per beat" parameter, how can I calculate this number when I want to use ADC with N'=12? Thank you for your help.