Reference design for adrv9364-z720 + adrv1crr-bob and adrv9364-z720 + adrv1crr-fmc

1. git checkout hdl_2019_r1

2. There is no existing design that supports ADRV9364+FMC carrier. You will need to update the constraints from an existing ADRV9364 project to map to the necessary pins on the FMC carrier. 

-Travis

Thanks Travis,
 On the other hand conr spect to design with Matlab. 
ADRV9364-Z7020 + BOB board is not compatible with 
Communications Toolbox  Support Package for Xilinx® Zynq®-Based Radio,
 but with ADI BPS. So can custom design be done from this tool?

 Thanks,
 Nicole.

HDL Coder just generates IP blocks and stitches them into a reference design. You need to create the base reference design first that the IP will be put into.

The base reference design needs to be built in Vivado first.

-Travis

Ok, thank you very much for your time.

Regarding development using Matlab.

1. What would be the benefit of using Matlab + Vivado versus

using only Vivado for custom design development?

2. Would it be possible from the develop of a modified reference design

for work with the adrv9364-z7020 + fmc boards, to use Matlab as part of the design tools?

For example, using the Communication Tools plugins to transmit and receive data

and even use the HDL Coder.

Nicole.

1. You can develop IP in MATLAB or Simulink instead of Verilog or VHDL. This is similar to System Generator.

2. Yes. The designs in Transceiver Toolbox are basic examples of customized reference designs, but primarily on the IP side and not for modifying external connections (The frequency hopping demo is the exception though). To create the base reference design or to take the ADI reference design and modify it for your needs will require experience in Vivado. There is no automated tooling to do this.

-Travis