QPSK HDL Example Data Represantation

Hi all,

I am trying understand the basics of QPSK Transmit and Receive Simulink HDL Design

The thing I noticed here is that both receive and transmit I and Q data paths are defined sfix16_En14, which is 16 bit word length with a 14 bit fraction length. Is there any special reason to use it in this way? Because, I would use int16 input and outputs for the block and do some logic operations to fit it 2s compliment representation as defined by Analog Devices?

Is there anything I am missing?

Any help would be appreciated

Thanks in advance.