I have 2 questions about no-os axi dmac IP usage.
1- Why driver that is shared in github for axi dmac does not include source address and destination address together. axi_dma_src and axi_dma_dest masters work almost simultaneously though when we compile source address or destionation address alonely. To do a better explanation:
I want to move a data from data memory to a peripheral like GPIO. I rearranged the driver like this: And it still works.
int32_t axi_dmac_transfer(unsigned int dest_addr,
unsigned int src_addr, uint32_t size)
{
axi_dmac_write(AXI_DMAC_REG_CTRL, 0x0);
axi_dmac_write(AXI_DMAC_REG_CTRL, AXI_DMAC_CTRL_ENABLE);
axi_dmac_write(AXI_DMAC_REG_FLAGS, 0x2);
axi_dmac_write(AXI_DMAC_REG_SRC_ADDRESS, src_addr);
axi_dmac_write(AXI_DMAC_REG_SRC_STRIDE, 0x4);
axi_dmac_write(AXI_DMAC_REG_DEST_ADDRESS, dest_addr);
axi_dmac_write(AXI_DMAC_REG_DEST_STRIDE, 0x0);
axi_dmac_write(AXI_DMAC_REG_X_LENGTH, size);
axi_dmac_write(AXI_DMAC_REG_Y_LENGTH, 0x20);
axi_dmac_write(AXI_DMAC_REG_START_TRANSFER, 0x1);
return 0;
}
2- When I enable asynchronous data move, it moves correctly but data movement has a sequence with different clocks. For example it moves the first data with 3 clock latency, the second one moves with 6 clocks latency. 3-6-3-6 and so on.. Why it is doing like this?
