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Using PPS ADRV9009-ZU11EG on ADRV2CRR-FMC

Hi,

We plan to use GPS PPS on ADRV9009-ZU11EG.

Do I need to use a reference clock generator that comes with a PPS output? Any particular board do you suggest?

If possible please let me know how we can practice a test?

Would you please let me know if there is any documentation available for using the PPS?

Thanks

  • Also how do the configuration change if I have adrv9009zu11eg + fmcomms8 and want to use a 10MHz Ext ref clock?

  • 
    /include/ "system-conf.dtsi"
    #include <dt-bindings/clock/ad9545.h>
    //#define REF_A_10MHZ 
    / {
    	ref_clk0: ref_clk_0 {
    		compatible = "fixed-clock";
    		#clock-cells = <1>;
    #ifdef REF_A_10MHZ
    		clock-frequency  = <10000000>; // 10MHz Ref. A
    #else
    		clock-frequency  = <1>;          // 1PPS Ref A.
    #endif		
    		
    		clock-output-names = "Ref-A";
    	};
    };
    
    
    /*
     * I2C1
     */
    &i2c1 {
    	status = "okay";
    	clock-frequency = <400000>;
    	pinctrl-names = "gpio";
    	pinctrl-0 = <&pinctrl_i2c1_gpio>;
    	scl-gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
    	sda-gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
    
    	i2c-mux@70 { /* u19 */
    		compatible = "nxp,pca9548"; /* TCA9548 */
    		#address-cells = <1>;
    		#size-cells = <0>;
    		reg = <0x70>;
    
    		i2c@0 { /* Audio ADAU1761 */
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <0>;
    
    			adau1761: adau1761@3b {
    				compatible = "adi,adau1761";
    				reg = <0x3b>;
    
    				clocks = <&audio_clock>;
    				clock-names = "mclk";
    
    				#sound-dai-cells = <0>;
    			};
    
    		};
    		i2c@1 { /* AD9545 */
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <1>;
    
    			ad9545_clock: ad9545@4a {
    				compatible = "adi,ad9545";
    				reg = <0x4a>;
    
    				#address-cells = <1>;
    				#size-cells = <0>;
    
    				adi,ref-crystal;
    				adi,ref-frequency-hz = <49152000>;
    
    				clock-names = "Ref-A";
    				clocks = <&ref_clk0 0>;
    
    				#clock-cells = <2>;
    
    				assigned-clocks = <&ad9545_clock AD9545_CLK_NCO AD9545_NCO0>,
    						  <&ad9545_clock AD9545_CLK_PLL AD9545_PLL0>,
    						  <&ad9545_clock AD9545_CLK_OUT AD9545_Q0A>;
    				assigned-clock-rates = <10000>, <1413120000>, <30720000>;
    				assigned-clock-phases = <0>, <0>, <0>, <180>;
    
    				aux-nco-clk@AD9545_NCO0 {
    					reg = <AD9545_NCO0>;
    					adi,freq-lock-threshold-ps = <16000000>;
    					adi,phase-lock-threshold-ps = <16000000>;
    				};
    
    				/* Ref A (J4) 10Mhz input */
    				ref-input-clk@0 {
    					reg = <0>;
    					adi,single-ended-mode = <DRIVER_MODE_DC_COUPLED_1V8>;
    					adi,ref-dtol-pbb = <10000000>;
    					adi,ref-monitor-hysteresis-pbb = <87500>;
    					adi,freq-lock-threshold-ps = <0xFFFFFF>;
    					adi,phase-lock-threshold-ps = <0xFFFFFF>;
    
    					
    #ifdef REF_A_10MHZ			/* 10 MHz Ref. A*/	
    					adi,r-divider-ratio = <200>; // 10MHz Ref. A					
    					adi,freq-lock-fill-rate = <20>;
    					adi,phase-lock-fill-rate = <20>;
    					adi,ref-validation-timer-ms = <1000>;					
    #else					/* 1PPS Ref. A*/
    					adi,r-divider-ratio = <1>;    // 1PPS Ref. A 
    					adi,freq-lock-fill-rate = <200>;
    					adi,phase-lock-fill-rate = <200>;
    					adi,ref-validation-timer-ms = <10000>;
    #endif
    					adi,freq-lock-drain-rate = <20>;
    					adi,phase-lock-drain-rate = <20>;
    				};
    
    				ad9545_apll0: pll-clk@AD9545_PLL0 {
    					reg = <AD9545_PLL0>;
    
    					#address-cells = <1>;
    					#size-cells = <0>;
    
    					profile@0 {
    						reg = <0>;
    						adi,pll-source = <4>;
    						adi,profile-priority = <20>;
    						adi,pll-loop-bandwidth-uhz = <200000000>;
    					};
    
    #ifdef REF_A_10MHZ			/* 10 MHz Ref. A*/		
    					profile@1 {
    						reg = <1>;
    						adi,pll-source = <0>;
    						adi,profile-priority = <0>;					
    						adi,pll-loop-bandwidth-uhz = <200000000>;
    
    					};
    #else					/* 1PPS Ref. A*/
    					profile@1 {
    						reg = <1>;
    						adi,pll-source = <0>;
    						adi,profile-priority = <0>;
    						adi,pll-loop-bandwidth-uhz = <50000>;
    						adi,fast-acq-excess-bw = <8>;
    						adi,fast-acq-timeout-ms = <10000>;
    						adi,fast-acq-lock-settle-ms = <100>;
    					};
    #endif					
    				};
    
    				output-clk@AD9545_Q0A {
    					reg = <AD9545_Q0A>;
    					adi,output-mode = <DRIVER_MODE_SINGLE_DIV_DIF>;
    					adi,current-source-microamp = <15000>;
    				};
    			};
    
    		};
    		i2c@2 { /* PTN5150 */
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <2>;
    
    			/* 1D */
    
    		};
    		i2c@3 { /* QSFP */
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <3>;
    
    			eeprom@50 {
    				compatible = "at24,24c02";
    				reg = <0x50>;
    			};
    		};
    		i2c@4 { /* SFP+ */
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <4>;
    
    			eeprom@50 {
    				compatible = "at24,24c02";
    				reg = <0x50>;
    			};
    
    		};
    		i2c@5 { /* FMC HPC */
    			#address-cells = <1>;
    			#size-cells = <0>;
    			reg = <5>;
    
    // 			ad7291@2f {
    // 				compatible = "adi,ad7291";
    // 				reg = <0x2f>;
    // 			};
    
    			eeprom@50 {
    				compatible = "at24,24c02";
    				reg = <0x50>;
    			};
    		};
    	};
    };