AD9142a DAC output issues

Dear Team ,

                    I am using two daughter cards on my customized ZYNQ(XC7Z030) board.

daughter_card1 => It consists of two chips (one ADC chip (ISLA2145p0) and one DAC chip (AD9142a))

daughter_card1 => It consists of two chips (two AD9142a chips ).

Now AD9142a configuration is being done by a MCU when we give power supply to the system Then after we configure the FPGA for generating data DCI and frame signals(This is done by taking AD9122 IP core as reference ) .we are using word interface mode .

With this setup the DAC outputs are not consistent i.e in some power up's all the DAC's are working and in some power up's any of the DAC output's are spur ,some times all DAC also .I thought this could be due to some timing issue and added set_output_delay constraints based on the setup and hold requirements mentioned in the AD9142a datasheet .I am attaching a word document which is having results .Ca you please look at this issue as fast as possible .

Thanks and Regards

B MOURYA CHANDRA

/cfs-file/__key/communityserver-discussions-components-files/323/HF3_5F00_channel_5F00_DAC.docx

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