I have implemented a HDL FFT module on the adrv9009zu11eg board. The FFT module works good in standalone. I've tried then to integrate it on the hardware project of the adrv9009.
The signal to listen is generated using the axi_dac_load_custom_data function which generates a sinusoidal 2MHz frequency. Relating the RX with the TX, I recover the 2MHz signal on which I calculate my FFT. I then read the adc data memory using the rdata= Xil_In32(ADC_DDR_BASEADDR + (uij*4));
The problem is that in each application RUN I have got a different representation of the FFT for the same signal frequency. Is is related to the RX and TX sampling frequencies or is there any other explanation.