Resource utilization of ADRV9009_core

Hello,

What version of the HDL are you using ? The latest version of HDL we are using generic TPL to implement the TX/RX/ORx transport layer. Most of the DSP resources are used by DDS so you could disable it if it doesn't fit in your device.

For adrv9009zu11eg design, you could use something like: 

set_property -dict [list CONFIG.DATAPATH_DISABLE {1}] [get_bd_cells tx_adrv9009_som_tpl_core/dac_tpl_core]

Regards,

Adrian

Hi Adrian,

We are using 2018_3 where we have a single adrv9009_core ip and not the latest version with 3 TPL cores.

Hello Carl,

In that case, can you set:  CONFIG.DAC_DDS_DISABLE{1} ?

Regards,

Adrian

Thank you Adrian.

The DSP usage reduced from 68 to 52.

Is that the best we can do? Or can we reduce it even further?

Thank you Adrian.

The DSP usage reduced from 68 to 52.

Is that the best we can do? Or can we reduce it even further?

Hi Carl,

Bi disabling  IQCORRECTION you can reduce the DSP sage even further, as we don't used them by default in the reference design:

CONFIG.ADC_IQCORRECTION_DISABLE {1} CONFIG.ADC_OS_IQCORRECTION_DISABLE {1} CONFIG.DAC_IQCORRECTION_DISABLE {1} .

DC filtering can also be removed for the last few DSP:

CONFIG.ADC_DCFILTER_DISABLE {1} CONFIG.ADC_OS_DCFILTER_DISABLE {1}

DC Filtering and IQ correction are part of the common infrastructure, but to my knowledge, we haven't enabled them in software for this project.

Regards,

Adrian

Thank you Adrian.