I'm trying to send data on display port using my adrv9009zu11eg board. I'm searching for the FPGA pin assignment and if there are some documentations on this topic.
The display port uses the PS8 GTR lines (Lane 2 as DP1 and Lane 3 as DP0) and uses as reference the 27MHz clk connected at PS_MGTREFCLK2[PN]_505 pin.
I have found those pin assignment, I think they are for the data I think. I did not find those for the clock. Could you help me ?