AD9139-DUAL-EBZ interfacing with FPGA

Hi All,

I have previously worked on AD9361 interfacing with the FPGA using the AD-FMCOMMS3-EBZ and KCU105 evaluation boards. For this purpose, I used the HDL reference design and the No-OS software which made my life pretty easy.

Now I am given a rather tougher task of interfacing AD9139 DAC with FPGA. I will be using AD9139-DUAL-EBZ evaluation board and Xilinx KC705 evaluation board. 

I could not find any HDL reference design for this task.

Here are my questions:

1. Is there any available HDL reference design for a similar DAC that can give me a starting point to work with this?

2. If there is none, can anyone with experience making these reference designs give me some guidelines or directions to tackle this difficult task? I came across a Xilinx application note which I think can help me generating and synchronizing LVDS signals for the 16 bit DAC input. "XAPP585: LVDS Source Synchronous 7:1 Serialization and Deserialization Using Clock Multiplication". Am I moving in the right direction?

3. If the task is really huge and I can end up stuck badly, can you recommend a DAC with similar capability that has some HDL reference design and software support?

Your help is badly needed and will be deeply appreciated Slight smile

Regards