Zedboard interfacing with AD-FCOMMS3-EBZ

I need to interface Zedboard with AD-FCOMMS3-EBZ.  I have prepared the SD card image as mentioned in the link: https://wiki.analog.com/resources/tools-software/linux-software/zynq_images.  The images which I have tried are : 22 June 2020 release (2019_R1) and 04 February 2020 release (2019_R1 RC). 

But the Zedboard is not booting. The following is observed on the console:

U-Boot 2014.07-dirty (Nov 20 2014 - 17:05:21)

Board: Xilinx Zynq
I2C: ready
DRAM: ECC disabled 512 MiB
MMC: zynq_sdhci: 0
SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB
In: serial
Out: serial
Err: serial
Net: Gem.e000b000
Hit any key to stop autoboot: 0
Device: zynq_sdhci
Manufacturer ID: 3
OEM: 5344
Name: SC16G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.8 GiB
Bus Width: 4-bit
reading uEnv.txt
392 bytes read in 9 ms (42 KiB/s)
Loaded environment from uEnv.txt
Importing environment from SD ...
Running uenvcmd ...
Copying Linux from SD to RAM...
reading uImage
** Unable to read file uImage **
Copying Linux from SD to RAM...
reading uImage
** Unable to read file uImage **
zynq-uboot>

It is given on the link mentioned above (reproduced below in bold text), to copy the images from subdirectory into the base directory. But there are no images files in the subdirectory corresponding to Zedboard+ADV7511+ADFCOMMS3-EBZ board file. The subdirectory has only BOOT.BIN file and a devicetree.dtb file and a zip file. I am not able to find the uImage in the subdirectory.  

The SD card includes a few images on it's BOOT partition. One of these images needs to be selected before the system will boot properly. In order to run any of these images, just copy the images from the subdirectory into the base directory, and then boot it. For newer versions of the SD card, uImage files are in subdirectories for FPGA board generation. Be sure to move the correct uImage into the root of the BOOT partition as well.

Please clarify whether base directory means BOOT partition of the SD card. What do you mean by "root of the BOOT partition"? Please let me know where the correct uImage can be found?

  • 0
    •  Analog Employees 
    on Oct 28, 2020 7:30 AM 28 days ago

    Hi Rajesh,

    On the SD card there are 2 paritions visible a BOOT and a rootfs. If you use windows you will only see the BOOT partition. Inside it are a number of folders with the names of different projects along with the name of the board that they are designed for.

    For FMCOMMS3 you must copy the files from zynq-zed-adv7511-ad9361-fmcomms2-3 into the BOOT root outside of this folder. Another thing to copy is the uImage from the zynq-common folder, again in the root of the BOOT parittion.

    Regards,

    Mircea

  • Thank you .  It worked and I am able to view the IIO oscilloscope program. I am trying to capture FM radio as described in the link: https://wiki.analog.com/resources/tools-software/fm-radio.

     The following are my Receive chain settings:

    RF bandwidth: 22 Mhz, Sampling Rate : 22 MSPS, RX LO frequency: 87.399, RF Port Select: A_Balanced.

    Can you please explain what is the BNC connector connected to the RX1A of FCOMMS3 board in the figure below.

    I am not able to view the peaks in the frequency domain as explained in the link.

    My capture of the receive chain is given below:

    I tried to listen to the headphone jack of the zedboard but I am not able to hear anything. Please clarify?

  • 0
    •  Analog Employees 
    on Nov 3, 2020 8:28 AM 22 days ago in reply to rajesh.k

    Hi Rajesh,

    The BNC connector has an antenna attached to capture FM frequency. You need that to capture something.

    Regards,

    Mircea

  • Hi Mircea,

    1. While trying to capture FM radio as explained in the link:  https://wiki.analog.com/resources/tools-software/fm-radio, the sampling rate is indicated as 22 MSPS. When the band to be captured is 20Mhz, sampling rate of 22 MSPS would lead to aliasing and affects the FM audio. I think the sampling rate must be atleast 40Mhz. Please clarify.
    2. The datasheet of AD9361 mentions that the receiver is a direct conversion system which means there is no IF (intermediate frequency) in the receive chain. In this scenario, is the local oscillator frequency of the receive chain always constant at the configured value or does it vary dynamically as per the incoming frequencies? In a traditional superheterodyne FM receiver, when we tune to a frequency, like 98.3Mhz, local oscillator frequency is changed to 109Mhz, in synchronism, to achieve an IF of 10.7Mhz.  
    3. In FDD mode, both the channels of TX and RX are enabled. How to enable only one of the channels of transmitters alone? I would like to transmit and receive only on one Transmitter and one Receiver.
    4. Since the RF bandwidth of AD9361 is 200Khz to 56Mhz, the minimum sampling rate of ADC for 200Khz would be atleast 400 Khz and for 56Mhz the minimum sampling rate would be 112Mhz. Is there any limitation on the maximum sampling rate provided to the ADC?
    5. As per the block diagram given (below) in ADI IIO Oscilloscope, the sampling rate provided by the Baseband PLL (700-1400 Mhz) to the ADC is 25-640MSPS and to DAC is 320 MSPS. Why are such high sampling rates provided to ADC & DAC?