I am using AD9375 platform with Zc706 utilizing the 2019-r1 hdl branch. I am looking for the ways for the Rx ADC triggering with the Tx outputs. In other words: when a signal sent from transmitters, some trigger signal should reach to the ADC IPs to start data capture in the receivers. However, I could not find any example design to realize this idea although such trigger exists in the evaluation platform of the AD937x myknos (with the name tx_rx_loop trigger). Do you have any example designs with this tx-rx triggering issue ? Which signal/outputs should or could be used in the hdl reference design to provide this rx capture triggering ?
Thank you for your interest.
Sorry for the additional post, but I think with a figure it can be understood better.
In the attached file you can see our experiment with the tx-rx loop. We transmit a signal continuosly at 700MHz, and receive the signal at the same frequency. We did this receive capturing 4 times, and each frames starting point is different. We basically want to get captures from the same point each receiving operation, so in the figure we want all lines (or peaks) to be aligned. My actual question is how could we modify the reference HDL design to have such adc triggering ?
This is no example code to do this with the open HDL from github.
However, it's not that hard to implement. Basically, you need to control the dataflow from the TX DMA and to the RX DMA together. This could be done with an extra IP core that handles the enable/valid signals between the DMAs so that once the TX DMA start producing data, the RX DMA will allow data into its buffer.