Adrv9371 hdl reference design porting to Intel cyclone 10 gx broad.

Hello ADI Engineer Zone Team,

I am currently trying to port AD9371 to Cyclone 10 gx developement board (10CX220YF780E5G) using the instructions given in the link from wiki page analog devices https://wiki.analog.com/resources/fpga/docs/hdl/porting_project_quick_start_guide. I have used Arria reference desgins files tried to create a same folder structure and files and changed the values and set the default assignment pin locations for cyclone FPGA. Now I try to build with all the changes.

I am getting errors regarding the jesd204 interface to the fpga. below are the mentioned ones.

2020.10.20.11:59:25 Error: add_connection sys_clk.clk ad9371_tx_jesd204.sys_clk: No interface named ad9371_tx_jesd204.sys_clk.
2020.10.20.11:59:25 Info: add_connection sys_clk.clk_reset ad9371_tx_jesd204.sys_resetn
2020.10.20.11:59:25 Error: add_connection sys_clk.clk_reset ad9371_tx_jesd204.sys_resetn: No interface named ad9371_tx_jesd204.sys_resetn.
2020.10.20.11:59:25 Info: add_interface tx_ref_clk clock sink
2020.10.20.11:59:25 Info: set_interface_property tx_ref_clk EXPORT_OF ad9371_tx_jesd204.ref_clk
2020.10.20.11:59:25 Error: set_interface_property tx_ref_clk EXPORT_OF ad9371_tx_jesd204.ref_clk: No interface named ad9371_tx_jesd204.ref_clk.
2020.10.20.11:59:25 Info: add_interface tx_serial_data conduit end
2020.10.20.11:59:25 Info: set_interface_property tx_serial_data EXPORT_OF ad9371_tx_jesd204.serial_data
2020.10.20.11:59:25 Error: set_interface_property tx_serial_data EXPORT_OF ad9371_tx_jesd204.serial_data: No interface named ad9371_tx_jesd204.serial_data.
2020.10.20.11:59:25 Info: add_interface tx_sysref conduit end
2020.10.20.11:59:25 Info: set_interface_property tx_sysref EXPORT_OF ad9371_tx_jesd204.sysref
2020.10.20.11:59:25 Error: set_interface_property tx_sysref EXPORT_OF ad9371_tx_jesd204.sysref: No interface named ad9371_tx_jesd204.sysref.
2020.10.20.11:59:25 Info: add_interface tx_sync conduit end
2020.10.20.11:59:25 Info: set_interface_property tx_sync EXPORT_OF ad9371_tx_jesd204.sync
2020.10.20.11:59:25 Error: set_interface_property tx_sync EXPORT_OF ad9371_tx_jesd204.sync: No interface named ad9371_tx_jesd204

The above errors are also there for ad9371_rx_jesd204, ad9371_rx_os_jesd204, axi_ad9371_tx_upack and other interface packages.

I wanted to know what all changes to be made in hdl library files to make the build happen. Meanwhile I have checked the other posts where was asked to check PLL for Arria and cyclone are same or not. If there are not same what changes are required to make in hdl files for jesed204 interface.

Please help me build it with the cyclone 10 GX. Also let me know if any other info is required regarding the build.

Thanks and regards,

Nikhil N H

  • 0
    •  Analog Employees 
    on Oct 20, 2020 4:45 PM 1 month ago

    Hi Nikhil,

    Can you tell us which version of Quartus are you using? Also which branch are you trying to port?

    Thanks,

    -Istvan

  • Hi Istvan,

    I am using quartus pro 19.2. I have tried to port it with both master and hdl_2019_r1 branch. I get the above mentioned error in both of the branches.

    Also I get this error at the beginning or start of the build stating the device family is unknown as shown below:

    2020.10.21.11:04:39 Warning: Both --quartus-project and --new-quartus-project switches are not used. A new Quartus project named system_qsys_script will be created using the tcl script filename: C:\cygwin64\home\z004877m\hdl-hdl_2019_r1\projects\adrv9371x\c10gx\system_qsys_script.qpf.
    2020.10.21.11:04:39 Info: Doing: qsys-script --script=system_qsys_script.tcl
    2020.10.21.11:05:04 Info: set_module_property NAME system_bd
    2020.10.21.11:05:04 Info: set_project_property DEVICE_FAMILY Cyclone 10
    2020.10.21.11:05:04 Info: Info: The device and speed grade is changed to the defaults of the device family, Cyclone 10.
    2020.10.21.11:05:04 Error: set_project_property DEVICE_FAMILY Cyclone 10: The device family Cyclone 10 is unknown.
    2020.10.21.11:05:04 Info: set_project_property DEVICE 10CX220YF780E5G

    Thanks and regards,

    Nikhil N H

  • 0
    •  Analog Employees 
    on Oct 21, 2020 9:58 AM 1 month ago in reply to Nikhilhalinge

    This tells a lot:

    Error: set_project_property DEVICE_FAMILY Cyclone 10: The device family Cyclone 10 is unknown.

    You should install the device package, I'm guessing.

    -Istvan

  • Hi Istvan,

    I have got the device package installed. I have checked it with other basic projects for cyclone 10 FPGA (10CX220YF780E5G) on my quartus pro 19.2.

    I wanted to know regarding the Jesd204B interface changes to be made in the adi hdl library for cyclone 10 FPGA.

    Thanks

    Nikhil N H

  • 0
    •  Analog Employees 
    on Oct 21, 2020 12:39 PM 1 month ago in reply to Nikhilhalinge

    I doubt that this comes from the JESD204B interface, at this point. Your tool's configuration is of somehow. Did you try to reach out to Intel for support?

    But in the other hand you have to update the framework to support the Cyclone 10 PHY. Which can be a little bit more complex task.

    If your tool is configured correctly you should see the following error message (using the master branch) :

    https://github.com/analogdevicesinc/hdl/blob/master/library/intel/adi_jesd204/adi_jesd204_hw.tcl#L246