I have a working build of ADRV9009 on the ZCU102 board. I have verified the complete working of transmitters, receivers, and hopping in this build. Now after porting the same to the ZC706 board, I am facing this rx_adxcvr_init failed issue. What changes are required to be done in the SDK code for this board? Any idea on why this problem is coming in the first place?
This happened because of including talise_config (.c and .h) files from profiles/tx_bw400...rx_bw200.. folder. Now I tried with talise_config files which are in profiles/tx_bw100...rx_bw100... folder and everything got initialized. What exactly is the reason? I am new to this device so please provide support regarding this.
By analyzing this I am thinking that when I am using a high sample rate profile then the transceivers are not getting initialized correctly. even the 7 series FPGA transceivers support up to 12.5Gb/s but ADRV9009 max sample rate require only 9.8 Gb/s then why the transceiver initialization error is occurring
The code that is being used is been downloaded from the Github repository
The profiles that I am using are in the same repo. When I include the .c and .h files present in the folder
then it is working. But when I use the other two profiles then rx_adxcvr:adxcvr_init() failed message is printed. What is the exact reason for this? There is no code modification done either in HDL or SDK source codes. It is the reference design that we are using. I am using the ZC706 evaluation board along with the ADRV9009 board.
Kindly provide possible support.
On the ZC706, the maximum rate or RX and ORx is 6.6 Gbps, as we are using the CPLL for deriving the RX channels clocks.
Because the standard ZC706 has a -2 device, maximum lane rate is 10.3125 Gbps.