axi_adrv9009_core IP issue

1. I want to make sure if the data format(which corresponds to the picture in the middle if one tx channel is enabled) of dac_data in util_adrv9009_tx_upack is the same as that of dac_tx_data in axi_adrv9009_core. I wonder where is the right place to put a DPD module if i want to do a DPD inplementation. I notice that iq correction is done in adrv9009 core IP so if i put the DPD module between util_adrv9009_tx_upack IP and  axi_adrv9009_core IP, the captured DPD output signal which is in front of axi_adrv9009_core IP is not iq corrected. If i put the DPD module behind axi_adrv9009_core IP, it seems a new upack is needed to generate DPD module input and a new cpack is needed to combine the DPD module output.

2. Since a new DMA controller is needed to capture the DPD module output, how is fifo_wr_overflow dealt with in PS? As far as i know, the fifo_wr_overflow of util_adrv9009_rx_os_cpack is connected to axi_adrv9009_core IP and PS access the overflow status througth AXI bus(which is described in axi_adrv9009.v).