I am using AD-FMCOMMS4-EBZ(AD9364)board with Xilinx Zynq ZC706 board and configuring it through No-OS driver. I have followed every step that has been given on your website (https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/baremetal).And just like you said,I dit it successful.
But now,I have a confusion,That is:
In linux OS,you offer me a QPSK Simulink model to generate QPSK data(https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/datafiles) and load it to IIO Scope,After running it I can get some QPSK informations,such as Spectrum Map and Constellation and so on.
However,in No-OS,you just tell me a way to configure it,I don’t konw how to generate QPSK data and load it to my ZC706 ,And how to use AD9364 that have performed configuration to transmit my custom QPSK data.Can you give me some document to learn or offer me some advise to complete it?
Hi,Sorry for the delayed reply, we had problems with the notifications, after some updates.Take a look at:https://github.com/analogdevicesinc/no-OS/blob/master/ad9361/sw/platform_xilinx/dac_core.c#L63
That's correct: keep in mind that AD9361 integrates 12-bit DACs and ADCs. The data sent to DAC core should be left aligned in the word transmitted and the data received from the ADC core is right aligned…
Using the no-OS project you can send custom data too (define DAC_DMA in main.c) - sine_lut array (defined in dac_core.c) is one example. You can replace it with your own data.
is there any example with custom data?
Hi,Sorry for the delayed reply, we had problems with the notifications, after some updates.Take a look at:https://github.com/analogdevicesinc/no-OS/blob/master/ad9361/sw/platform_xilinx/dac_core.c#L63https://github.com/analogdevicesinc/no-OS/blob/master/ad9361/sw/main.c#L457
Thank you andrei. I want to ask one question. Assume I want to transmit data periodically, do I have to change the sine_lut like message_buffer and write the message in this buffer? Is this the logic behind that?
That's correct: keep in mind that AD9361 integrates 12-bit DACs and ADCs. The data sent to DAC core should be left aligned in the word transmitted and the data received from the ADC core is right aligned in the word received.
The data is stored in two's complement format.