AD9467-FMC-250EBZ Xilinx Reference Design

Dear all,

I'm new with the embedded systems. I'm trying to interface the AD9467-FMC-250EBZ with the 7030 PicoZed + FMC Carrier Card V2. To become familiar with my design, I'm following the example/tutorial of https://wiki.analog.com/resources/fpga/xilinx/fmc/ad9467 . I know that this example is based on the Zedboard but I have just to change the constraints file to adapt to my Zynq.

 

I followed the tutorial instructions but I’m not able to build the HDL design and generate a bit stream. I get errors (see attachments).

 

1) Can someone help me solving those issues?

 

2) Is it possible to have directly the Vivado project (Vivado 2015.4.2) such that I don't have to follow the tutorial?

 

3) Can someone show me the top level design such that I can have an idea on the main blocks?

 

Thank you very much in advance.

 

Best Regards,

Marco

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