Xilinx JESD core vs. ADI JESD core

Question

Hi all, 
 Hoping someone could clear something up for me... Working with the AD9371, and ADI has developed a whole slew of JESD204 interface cores, specifically: 
 
 axi_adxcvr_v1_0 
 util_adxcvr_v1_0 
 ADI JESD204B Receive AXI Interface 
 ADI JESD204 Receive 
 ADI JESD204B Transmit AXI Interface 
 ADI JESD204 Transmit 
 
 What is the recommendation in terms of using these vs. the Xilinx JESD PHY and core? I already have the Xilinx license, so cost isn't relevant to this particular application.

ADIApproved · Accepted Answer

Our ultimate goal is to use the ADI JESD IP core in conjunction with the Xilinx PHY. In the next release (hdl_2017_r1) the ADI JESD IP core will be adopted (that is what you see in the dev branch now). After that (hdl_2017_r2), we will integrate the Xilinx PHY too. 
 So in the future we going to support the combination mentioned above. And in all our future developments, we are going to use those IPs. 
 Thanks, 
 -Istvan