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AD9361 Recommended for New Designs
The AD9361 is a high performance, highly integrated radio frequency (RF) Agile Transceiverâ„¢ designed for use in 3G and 4G base station applications....
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AD9361 on Analog.com

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PICOZED SDR KIT AD9361 LOOPBACK?

		
	
				

			

									
					    Vinaybhatt
					
							

            
            			
				
									
											
			
			
				
			
			
			    	
			                    
                
				                on Oct 9, 2017 
				
			
			
		

		
		                    	    

        	    
Thread Summary

                The user inquires about loopback modes in the Picozed SDR kit with AD9361. The final answer distinguishes between BIST (built-in self-test) loopback, which is internal to the AD9361, and HDL loopback, which is within the FPGA. To test the RF section, BIST can generate a tone without involving the FPGA, or the DDS in the FPGA can generate a tone. The user must determine which loopback mode to enable and how to observe the results, potentially using tools like ChipScope.
                        	    

                
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I was trying to understand loopback in picozed sdr kit ad9361 no os application using example files.

 
1. What is the difference in BIST Loopback and HDL Loopback?

 
2. Loopback functions are in ad9361.c,ad9361.h and ad9361_conv.c - How to enable loopback and how to see the result?

 
3. Are we using BIST Signal generator in above files for loopback?

 
4. There are 2 types of loopback in ad9361 - RF Section Active/Inactive. How to test/check each one of these?

 
5. In loopback is it--- data injected at Rx AND WATCHED AT tX PORT OR tX TO Rx? Where to check loopback data? do i require chipscope or any tool?

 
Thanks.

			

			
									
		                             
                        

    

                                            
                 ad9361
                
                                                    
                 Wideband Transceiver IC
                
                                                    
                 RF Integrated Transceivers
                
                                
            

    
    
		


				
				        
        		

			
						
									
												
			
			
                        
                                    
                        
                        
                        
            
			            
						
						
			
			
			
			
		


        
        
        
    
					

			





















	

	

					



			


				
	









	
    
	

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    •  Analog Employees  
    
            
						
                            
            
            				
            
                on Oct 9, 2017 3:11 PM
            
            
						
			            		
    
		
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    1. BIST (it is not fully a 'self-test')  is inside the device (you can generate a tone to the RF side or you can loop things back etc)
    
 
    HDL loopback is inside the FPGA (you can loopback only, tone is DDS function and is separate).
    
 
    The rest of your questions are yours to answer.  It is up to you to make sense of which loopback to enable/disable. It is also up to you to use those functions to achieve your desired loopback.
    
 
    As an example, let's say you want to check the RF side only.
    
 
    1. You can have BIST (in device) to generate a tone (completely ignoring the FPGA)
    
 
    2. You can use the DDS (FPGA) to generate a tone (pulling FPGA into your test)
    
 
    And so forth.
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
				
						
						
				
				
		
		
    
			
		
    
	
    

    

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