JESD204B Lane Latency and MCS on the ADRV9009-ZU11EG SOM

Hi, 

I have a question regarding how to interpret the relative latency measurement from the JESD Status Tool (https://wiki.analog.com/resources/tools-software/linux-software/jesd_eye_scan ) in a multi-chip synchronous system such as the ADRV9009-ZU11EG. 

When a profile is loaded, often times the Lane Status shows a count of 0 lane errors, and the relative lane latencies are all low (green). Sometimes, the profile loads successfully, there are 0 errors per lane, but the latency from one or more of the lanes relative to the reference lane is large enough to flag an error (yellow or red, as defined in the jesd_eye_scan source code).  

If SYSREF is captured, there are no SYSREF alignment errors, and no other perceivable problems of any kind, should concern be had or any action taken? I am particularly interested in the case of a multi-chip phase synchronous system such as the SOM. My understanding is that if the lane latencies are too far apart, they cannot be corrected and the samples will not be aligned (as in the link below). Mainly trying to understand if that is happening here or not and how serious this condition is. 
https://www.analog.com/en/technical-articles/demystifying-deterministic-latency-within-jesd204b-converters.html

For example, if lane latency errors are detected, they can be corrected by repeating MCS sync one or more times; is this something that should be done at the system level prior to relying on the data to be coherent across chips as in UG-1295 Figure 70. RF PLL Phase Synchronization - Initialization to Tracking Results? Is there a better approach to minimize the occurrence of the errors than repeating MCS sync? 

Thanks,
Adam 


Environment:
I've attached an image with some screenshots from the eye scan tool illustrating the issue, using the ADRV9009-ZU11EG SOM evaluation setup, no device tree or board modifications, the 04 February 2020 release (2019_R1 RC), and an example custom profile. The profile was generated with the profile generator tool version 2.4 then loaded via the iio-oscilloscope, and is also attached. 


Tx_BW125_IR163p84_Rx_BW125_OR163p84_ORx_BW125_OR163p84.txt
<profile Talise version=1 name=Tx_BW125_IR163p84_Rx_BW125_OR163p84_ORx_BW125_OR163p84>
 <clocks>
  <deviceClock_kHz=163840>
  <clkPllVcoFreq_kHz=6553600>
  <clkPllHsDiv=2.0>
 </clocks>

 <rx name=Rx 125.00MHz, OutputRate 163.84MHz, TotalDecimation 10>
  <rxChannels=TAL_RX1RX2>
  <rxFirDecimation=2>
  <rxDec5Decimation=5>
  <rhb1Decimation=1>
  <rxOutputRate_kHz=163840>
  <rfBandwidth_Hz=125000000>
  <rxBbf3dBCorner_kHz=125000>
  <rxDdcMode=0>

  <rxNcoShifterCfg>
   <bandAInputBandWidth_kHz=0>
   <bandAInputCenterFreq_kHz=0>
   <bandANco1Freq_kHz=0>
   <bandANco2Freq_kHz=0>
   <bandBInputBandWidth_kHz=0>
   <bandBInputCenterFreq_kHz=0>
   <bandBNco1Freq_kHz=0>
   <bandBNco2Freq_kHz=0>
  </rxNcoShifterCfg>

  <filter FIR gain_dB=-6 numFirCoefs=48>
  -2
  -6
  11
  21
  -32
  -57
  78
  127
  -165
  -251
  316
  457
  -561
  -781
  953
  1289
  -1610
  -2246
  2450
  3675
  -4332
  -7460
  9234
  31661
  31661
  9234
  -7460
  -4332
  3675
  2450
  -2246
  -1610
  1289
  953
  -781
  -561
  457
  316
  -251
  -165
  127
  78
  -57
  -32
  21
  11
  -6
  -2
  </filter>

  <rxAdcProfile num=42>
  264
  168
  181
  90
  1280
  640
  1287
  53
  1141
  26
  735
  29
  48
  41
  28
  192
  0
  0
  0
  0
  48
  0
  7
  6
  42
  0
  7
  6
  42
  0
  25
  27
  0
  0
  25
  27
  0
  0
  165
  44
  31
  905
  </rxAdcProfile>
 </rx>

 <obsRx name=Rx 125.00MHz, OutputRate 163.84MHz, TotalDecimation 10>
  <obsRxChannelsEnable=TAL_ORX1ORX2>
  <enAdcStitching=0>
  <rxFirDecimation=2>
  <rxDec5Decimation=5>
  <rhb1Decimation=1>
  <orxOutputRate_kHz=163840>
  <rfBandwidth_Hz=125000000>
  <rxBbf3dBCorner_kHz=225000>
  <orxDdcMode=0>

  <filter FIR gain_dB=-6 numFirCoefs=48>
  -2
  -5
  11
  18
  -31
  -48
  75
  108
  -156
  -215
  296
  392
  -522
  -671
  882
  1108
  -1492
  -1950
  2263
  3166
  -4052
  -6342
  9553
  30383
  30383
  9553
  -6342
  -4052
  3166
  2263
  -1950
  -1492
  1108
  882
  -671
  -522
  392
  296
  -215
  -156
  108
  75
  -48
  -31
  18
  11
  -5
  -2
  </filter>

  <orxLowPassAdcProfile num=42>
  264
  168
  181
  90
  1280
  640
  1287
  53
  1141
  26
  735
  29
  48
  41
  28
  192
  0
  0
  0
  0
  48
  0
  7
  6
  42
  0
  7
  6
  42
  0
  25
  27
  0
  0
  25
  27
  0
  0
  165
  44
  31
  905
  </orxLowPassAdcProfile>

  <orxBandPassAdcProfile num=42>
  264
  168
  181
  90
  1280
  640
  1287
  53
  1141
  26
  735
  29
  48
  41
  28
  192
  0
  0
  0
  0
  48
  0
  7
  6
  42
  0
  7
  6
  42
  0
  25
  27
  0
  0
  25
  27
  0
  0
  165
  44
  31
  905
  </orxBandPassAdcProfile>

 </obsRx>

 <lpbk>
  <rxFirDecimation=2>
  <rhb1Decimation=1>
  <outputRate_kHz=163840>
  <rfBandwidth_Hz=75000000>
  <rxBbf3dBCorner_kHz=225000>

  <filter FIR gain_dB=-6 num=48>
  -2
  -5
  11
  18
  -31
  -48
  75
  108
  -156
  -215
  296
  392
  -522
  -671
  882
  1108
  -1492
  -1950
  2263
  3166
  -4052
  -6342
  9553
  30383
  30383
  9553
  -6342
  -4052
  3166
  2263
  -1950
  -1492
  1108
  882
  -671
  -522
  392
  296
  -215
  -156
  108
  75
  -48
  -31
  18
  11
  -5
  -2
  </filter>

  <lpbkAdcProfile num=42>
  267
  168
  181
  90
  1280
  623
  1285
  51
  1137
  25
  727
  30
  48
  41
  27
  190
  0
  0
  0
  0
  48
  0
  7
  6
  42
  0
  7
  6
  42
  0
  25
  27
  0
  0
  25
  27
  0
  0
  165
  44
  31
  905
  </lpbkAdcProfile>
 </lpbk>

 <tx name=Tx 125.00MHz, InputRate 163.84MHz, TotalInterpolation 10>
  <txChannels=TAL_TX1TX2>
  <dacDiv=1>
  <txFirInterpolation=2>
  <thb1Interpolation=1>
  <thb2Interpolation=1>
  <thb3Interpolation=1>
  <txInt5Interpolation=5>
  <txInputRate_kHz=163840>
  <primarySigBandwidth_Hz=75000000>
  <rfBandwidth_Hz=125000000>
  <txDac3dBCorner_kHz=187000>
  <txBbf3dBCorner_kHz=62500>

  <filter FIR gain_dB=6 numFirCoefs=40>
  2
  -20
  8
  72
  -41
  -177
  118
  364
  -261
  -681
  505
  1196
  -909
  -2092
  1435
  3663
  -1908
  -6365
  3007
  17911
  17911
  3007
  -6365
  -1908
  3663
  1435
  -2092
  -909
  1196
  505
  -681
  -261
  364
  118
  -177
  -41
  72
  8
  -20
  2
  </filter>
 </tx>
</profile>

  • +1
    •  Analog Employees 
    on Mar 10, 2020 3:40 PM 8 months ago

    Hello Adam,

    If the latency between the lanes has a different number of multiframes, the MCS sync needs to be reissued. If all lanes have the same number of multiframes but different octet latency, it should work ok as the data will be released on all lanes on the next multiframe.

    Regards,

    Adrian