AD9434 Evaluation board with Intel Altera FPGA Carrier Board

Hi

My customer wants to evaluate AD9434 ADC with their FPGA evaluation kit which is Cyclone 10 GX with FMC connector.

Unfortunately, the AD9434-FMC-500EBZ is obsolete. Even if it is available, it requires ZC706 as Carrier board (as per our Wiki).

https://wiki.analog.com/resources/fpga/xilinx/fmc/ad9434

Any suggestions what could be done here?

Thanks

IK

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  • 0
    •  Analog Employees 
    on Feb 21, 2020 9:25 AM

    HI,

    Porting the AD9434-FMC-500EBZ on Intel is not a straight forward process.

    There might even be incompatibilities that will not allow for it to work in the Cyclone 10.

    We don't have the Cyclone 10 and no plan to add support for the AD9434-FMC-500EBZ on Intel devices. This being said the support we can offer is limited to simple answers.

    There is a start guide on how to port projects.
    https://wiki.analog.com/resources/fpga/docs/hdl/porting_project_quick_start_guide

    As described in the link above, the first thing to check out is the hardware compatibility. If things are compatible the next major thing is the hdl interface to the AD9434.

    https://github.com/analogdevicesinc/hdl/blob/master/library/axi_ad9434/axi_ad9434_if.v

    We have projects supporting SERDES based interface on Intel devices, so there are examples.

    The axi_clkgen can be replace wit a FPLL from Intel.

    This is a start, we will answer questions along the way.

    Regards,
    Andrei

  • 0
    •  Analog Employees 
    on Feb 26, 2020 9:38 AM in reply to andrei_g

    Hi Andrei,

    From your reply things are clear but just to confirm and check all possibilities. I am asking the following:

    • Using AD9434-FMC-500EBZ with Cyclone 10 major problems are in Software (build/driver/configurations/API)?
    • This board """"AD9434-500EBZ :Evaluation Board (Compatible with HSC-ADC-EVALCZ)""""Will work only with ADI capture board: HSC-ADC-EVALCZ. Using AD9434-500EBZ with Cyclone 10, we have to chase hardware plus software problems? It will not work even if we have something like FMC adapter?

    Thanks

    IK

  • 0
    •  Analog Employees 
    on Feb 27, 2020 8:04 AM in reply to IrfanKhan

    Hi,

    The easiest way is to use the AD9434-FMC board. From my experience not all Intel evaluation board are compliant  to the FMC standards regarding input clock pins location on the FMC connector, this is the first thing to look for.

    In the above case the major points are HDL and Linux image. If you get a Linux working on the board, the driver and API (libiio - IIO-Oscilloscope) should be compatible.

    You can bring up the system faster using no-OS(bare-metal). The main problem there is that we only  support the nios2 processor on Intel devices.
    After configuring the system, you can capture the data from ad9434 store it in RAM and then move it to you PC, where you can use Visual Analog or Matlab to interpret the data.

    The reference design that we have on the ad9434 is made for the FMC board. The AD9434-500EBZ will give a lot of extra work as you mentioned. I can't say if it will work or not. You can check that, but I recommend using the FMC card.

    Andrei

  • 0
    •  Analog Employees 
    on Mar 3, 2020 3:47 PM in reply to andrei_g

    Hi Andrei,

    ZC706 was recommended as carrier board for the AD9434-FMC, FPGA reference design.

    I have done a comparison of Cyclone 10 GX (High pin count FMC) with Z706 (FMC) and they appear to be the same. Specially the clock PINS. Please see the attached files.

    However, I have checked the FMC of AD9434 using the schematics. Only H4 and H5 pins mention the clocks. Is it sufficient?

    Can we say now that (AD9434-FMC-500EBZ + Intel Cyclone 10 GX ) passes the first clock pin test ? Thanks

    IK

  • 0
    •  Analog Employees 
    on Mar 6, 2020 9:07 AM in reply to IrfanKhan

    Hi IK,

    Looking at the ad9434 schematic you can select the clock path to be on G6-G7 or either on H4-H5.

    Our reference design uses G6-G7 https://github.com/analogdevicesinc/hdl/blob/master/projects/ad9434_fmc/zc706/system_constr.xdc#L3-L4

    As I understand from you  post you can use one of those on the Cyclone 10. So you should be ok from the clock point of view.
    Now make sure that all data pins are connected to the same FPGA bank with the clock. If the pins are spread across different banks things will get a bit more complicated.

    Regards,
    Andrei

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