I've been studying the FMCOMMS2 Zed project included in the analog devices github repository. I'm working on several AXI Streaming IP Cores for my master's project and would like to interface them between the util_cpack2 and ADI AXI DMA Controller. I'd prefer not to write more code than I have too. Is there any existing IP core to convert the FIFO out of util_cpack2 to an AXI Stream? Has anyone modified the util_cpack2 core to use a AXI Stream instead?
I see that the ADI AXI DMA Controller can do this but was trying to also avoid two DMA Controllers to keep latency low.
Can the DMA Controller be configured as a dumb core that just converts the FIFO to AXI Stream?
I'd like to retain the use of IIO Scope and GNU Radio as much as possible.
On the DAC side there is a AXI Streaming Master to the util_upack2 that I can directly insert my cores easily.
Thank you in advance for any guidance.
Moving to FPGA subspace.