I'm looking for HDL (either Verilog or VHDL) source that configures an AD9265 or similar ADC via their associated SPI port. Ideally, the AD9265 would be configured from a block memory used as a ROM containing the SPI address and SPI data for configuring the AD9265. The contents of that block memory are loaded when the FPGA is configured.
I thought I saw Verilog for doing this in a reference design for another part. Sadly I did not download that reference design at that time when I stumbled across it. I did download the "HDL-Master" repository from github but I didn't see anything that looked SPI configuration code.
Of course, I can write this myself but I'm trying to save myself a few days of work. The "best" engineers are always the lazy ones. :)
Thanks for your help!
We don't have a reference design with the use case you have in mind, for any of our projects at this time.
We have an HDL reference design for AD9265 FMC at https://github.com/analogdevicesinc…
We have an HDL reference design for AD9265 FMC at https://github.com/analogdevicesinc/hdl/tree/master/projects/ad9265_fmc which works with https://github.com/analogdevicesinc/no-OS/tree/master/ad9265-fmc-125ebz software.
The HDL implements the LVDS interface and DMA interface, but for the SPI configuration uses the ARM processor.