Reference Design Clocks

Hi,

I am using an ADRV9009 with a ZCU102. I have configured the Talise using the wizard as shown below. I have added a system ILA block to the reference design to monitor the signals at the input to the axi_adrv9009_dac_fifo. The sampling rate is 61.44MSPS as programmed, but it appears that the dma_clk is not changed by the Device Clock value. Is this expected? What are the Tx and Rx clock frequencies, and can they be changed?

Thanks