We're having a problem with the SOM/Carrier powering off when were trying to debug custom designs over JTAG. This could be trying to program the FPGA directly to assess interfaces with IBERT cores (ie: totally custom PL design) or through the SDK with a custom bare-metal PS design (FSBL + say an augmented HelloWorld program) and released ADI PL firmware. In all of these cases, everything starts off fine and operational and after what seems like a variable and random amount of time, the entire stack powers down.Is there a way to disable this auto-powerdown behavior in these cases? Maybe something we can add to the FSBL template design or otherwise?Thanks!
Thank you for the suggestion. I applied the changes and so far everything has been working as expected.
We recently set up a second set of boards (SOM and Carrier) and programmed the ADM1266 with the updated configuration. These boards have been left powered-on and idle for the past two nights, and on both nights the ADM1266 recorded VDDA3P3_CLK under voltage faults and disabled the power supplies. Is this something that you have observed as well? Do you have any recommendations on how to proceed?
We haven't seen any issues with that rail, but since it's powered by the same ADP5054 they could be related.
Can you try the following HW changes and revert to the original sequencer setup?
R337, R304 – 31.6K, 0402E27, E25, E23 – BLM18KG471SN1DE24, E21 – BLM18KG121TN1D
This should fix all the ADP5054 issues.
Yes, I will try this and let you know how it goes. I think I've located all of the components, but would you be able to provide an assembly drawing or other documentation to confirm them?
I will attach some pictures so you can find the components