I am trying to modify the ADRV9009/ZCU102 reference design to loopback samples (Rx to Tx) within the fabric. I have connected the output of the util_adrv9009_rx_cpack module to the input of the axi_adrv9009_tx_dma via a custom module. This custom module receives 64-bit packed rx samples over a FIFO interface and outputs 128-bit packed tx samples over a AXI-streaming interface (tx_0 = rx_ch0i_0 rx_ch0q_0 rx_ch1i_0 rx_ch1q_0 rx_ch0i_1 rx_ch0q_1 rx_ch1i_1 rx_ ch1q_1). I changed the input interface of the axi_adrv9009_tx_dma module to axi-streaming.
It does not appear to be working, so I have a couple of questions:
I would be grateful for any advice.