ADRV9009/ZCU102 Reference Design Loopback


I am trying to modify the ADRV9009/ZCU102 reference design to loopback samples (Rx to Tx) within the fabric.  I have connected the output of the util_adrv9009_rx_cpack module to the input of the axi_adrv9009_tx_dma via a custom module. This custom module receives 64-bit packed rx samples over a FIFO interface and outputs 128-bit packed tx samples over a AXI-streaming interface (tx_0 = rx_ch0i_0 rx_ch0q_0 rx_ch1i_0 rx_ch1q_0  rx_ch0i_1 rx_ch0q_1 rx_ch1i_1 rx_ ch1q_1). I changed the input interface of the axi_adrv9009_tx_dma module to axi-streaming.

It does not appear to be working, so I have a couple of questions:

  • Has anyone managed to get this mode of loopback working? If so, how?
  • What are the xfer_req signals for?

I would be grateful for any advice.


Parents Reply
  • Hi,

    Made these changes and behavior is the same - the ready signal does not go high. The confusing thing is that the ADI oscilloscope software starts at power up, and if I change the FPGA Settings -> Transmit/DDS -> Tx1 -> DDS Mode value to 'One CW Tone' I can see this tone on an analyzer. How is this possible if I have disconnected the transmit chain from the PS?