no-OS code of AD9379A?

Hi,

You used make to build the HDL project right?
can you do the same for no-OS https://github.com/analogdevicesinc/no-OS/commits/master/ad9739a-fmc-ebz/zc706?
According to https://wiki.analog.com/resources/fpga/quick_validation.

Andrei

Thanks for your reply.

I'm sure that I build the HDL project right. I have followed the steps in https://github.com/analogdevicesinc/no-OS/commits/master/ad9739a-fmc-ebz/zc706?. But when I type "make" and enter in the terminal in the "\no-OS\ad9739a-fmc-ebz\zc706" path, a fatal error happens "../src/ad9739a.h:49:10: fatal error: spi.h: No such file or directory". I don't know why.

Hi,

Can you open xsdb from a terminal or SDK GUI, and manually program the board.

功程292 said:

ad9739a_setup(&ad9739a_device, &init_param)", "Error: Invalid CHIP ID (0xff).

If the above was not resolved, you can't transmit any kind of data.

-extract the files from .hdf archive
-write the bit

fpga -file system_top.bit

    source ps7_init.tcl
    ps7_init
    ps7_post_config

dow sw/Release/sw.elf

-run

con

Have you made the hardware changes suggested above?

Andrei

I do the following steps:

Firstly, I download the hdl(2018-r2) and no-os(2018-r2) on the github. And I use the "make" command to create a vivado 2018.2 project for zc706.

Secondly, I also use the "make" command to create the no-os project of ad9739.

Thirdly, I launch sdk in vivado and I add the existing sdk project of no-os to sdk.

Finally, I run the debug as the following pictures.

Is there any problem in my steps? Thank you!

Hi,

There is no problem with your steps. This is the flow we recommend and everything seems to be ok.
I've worked with people that modified the code, used other tools or had issues with the combination of OS and tool.
This is just my attempt to "play safe" and find the problem faster. I want to exclude any build issues.

Andrei

Okay. But I have questions with your steps above. Could you describe these steps more clearly?

For example, how can I extract the files from .hdf archive. I can't find the .hdf archive.

Hi,

The hdf system_top.hdf is a container according to Xilinx.
If you are on windows you can use 7zip. Not sure about other third-party tools on Linux.
You can use "hsi" from Xilinx.

hsi open_hw_design system_top.hdf

This should work in xsct.

Andrei

I follow your steps above.

Firstly, I extract the .hdf file and get some files. And I run the xsdb terminal.

The following steps are as follows:

I use the ad9739a_zc706.zip file supplied from you.

Hi,

Ok. What was the result? UART console.
What is the status on the hardware modifications?

Andrei

UART console is the same as before.

I haven't do these hardware modifications above. You mean I need to switch to ACLK914 clock path?

Yes and desolder - solder the mentioned components.

Andrei

Hi.

I noticed that the pads of the mentioned components are already on the position of the narrow pads closer to the ADCLK914.

After I saw the schematic of the board, I noticed that the output clock of adf4350 is not connected to any ports. Does it mean the adf4350 on the board will not do anything?

After I switch to the ADCLK914, how much input frequency (J3) do I need? Is a random value in 1.6GHz to 2.5GHz okay?

Hi.

I noticed that the pads of the mentioned components are already on the position of the narrow pads closer to the ADCLK914.

After I saw the schematic of the board, I noticed that the output clock of adf4350 is not connected to any ports. Does it mean the adf4350 on the board will not do anything?

After I switch to the ADCLK914, how much input frequency (J3) do I need? Is a random value in 1.6GHz to 2.5GHz okay?

Hi,

功程292 said:

Does it mean the adf4350 on the board will not do anything?

Out of the box, no. adf4350 is there as a second option (enabled by desolder/soldering those capacitors). The reference design considers it as being used.

功程292 said:

Is a random value in 1.6GHz to 2.5GHz okay?

From what it can be seen in the datasheet, yes. You can ask more questions regarding the clock in High-Speed DACs forum. Using a 2.5GHz external clock will work with the no-OS reference code, without any modifications.

Andrei

I thought I seemed to find the problem.

These pictures above are the power supply on AD9739A evaluation board. I have found that there are no connection between JP1 and JP2 on the board. Besides, I have measured the TP12 TP2 TP1 TP3. And there is no voltage on the board! Does it mean I must solder a 0 ohm resistance on JP1 and JP2 pad?

Hi, I've solved the problem and it's working. Thank you for helping me!

Hi, I have a new problem!

I've tried to write the verilog code about spi configuration of the ad9739a evaluation board which has two spi devices (adf4350 and ad9739a). I'm sure that the spi code is working normally because the spi data read from ad9739a is right. But the adf4350 spi doesn't work normally. After I configure the register in adf4350, the LD light on the board isn't on. The debug picture of adf4350 spi are as follows:

the clock frequency of ILA is 200MHz. According to the datasheet of adf4350, the timing is correct.

The data written to r0-r5 register of adf4350 is 0x00320000, 0x00008009, 0x00006e42, 0x00000003, 0x008c823c and 0x00580005.

I don't know why it isn't working.

Hi, I have met an interesting problem.

When I download and debug the ADI reference design (hdl and no-os projiect), sometimes the LD light is on, sometimes it isn't. Besides, sometimes the chip_id of ad9739a can be read successfully, sometimes it can't. But the DLL of ad9739a always can't be locked. I'm sure I'm using the same code and the jumper jumps to FMC source.