Can anybody help me by providing reference code to prove my design.
FPGA:- ZC706 board with AD9172.
Hi Cristian Pop,
Could you please send me your E-mail ID, so that i can share the .hdf file.
Please use the "Insert->Insert image/video/file" menu to upload the file
i am getting like above message after uploading.
The project can be found here: https://github.com/analogdevicesinc/hdl/tree/master/projects/dac_fmc_ebz/zc706 and documentation here: https://wiki.analog.com/resources/eval/user-guides/ad-dac-fmc-ebz
Please change the extension .txt to .hdf
What revision of the ZC706 board are you using ? Did you change the default VADJ settings of 2.5V to other voltage ?
We are using ZC706 version2.0.
VADJ is 2.5V as default.