How many clocks ports are there on SOM and what is their frequency? I checked adrv9361z7035_constr_lvds.xdc file and found rx and tx clocks on (j14,H14) and (K13, J13) respectively. Can u guide me about their frequencies. thanks
Hi,Rx -> l_clk -> Tx.This clocks run at: "sampling frequency" * mode * 2.e.g. sampling rate = 61.44MSPS, mode = 2R2T, => rx_clk=l_clk=tx_clk=245.76MHz sampling rate = 30.72MSPS, mode = 2R2T, => rx_clk=l_clk=tx_clk=122.88MHz2R(1R) respectively 2T(1T) reflect the number of channel used per direction.You can find more questions/answers about this topic on EZ.Also, take a look at https://wiki.analog.com/resources/fpga/docs/hdl/fmcomms2_fir_filt#understanding_fmcomms2_clock_routingfmcomms2 is a design based on the same AD9361 and has the same concepts.
Hi, Sorry I was on leave.
Thanks for this clarification. It cleared my mind about sampling rate and clock frequency.
Actually I wanted to control the RX and TX path of tmore than adrv9361-z7035 boards. I want some logic that can enable or disable RX/TX of desired boards running independently.To prototype such apparatus, I'm trying to connect two adrv9361-z7035 boards through Pmod p11 (one side as sender and other as receiver) We usually get a master xdc file with FPGA board through we access the GPIOs. Can u guide me the independent PL clock and Pmod Pins i can use? I can see Pmod pin names in ccfmc_constr.xdc but I couldn't find their usage and PL clocks.
I hope i cleared my problem. I would appreciate if u could advise me some better approach. Thanks
What is not clear, do you want to use some GPIOs from the PS7? Or something else... Are this GPIOs controlled by the HPS or the PL?
You have to track the signals on the schematic, first:-on the FMC carrier: PMOD0_D0_3V3 -> PMOD0_D0 -> connector JX2 pin 67-on the SOM: connector JX2 pin 67 -> IO_L21_13_JX2_P (AC18)You will find it in the ccfmc_constr.xdcAndrei
Thank you very much. I successfully controlled the RX HDL path using PL Pmod (P11). Next I would try to make this control using c application in linux on PS part.
Is their any way i could add control functionality (just Enable/Disbale for now) in RF path? Like if i could disable the RX/TX from RF side. Doesn't matter using GPIOs, HPS or the PL.