I built a simple block to synthesize it using hdl coder, which is shown in the first figure. I did it using matlab 2018b ,vivado 2017.4 and BSP of ZC702 with FMCOMMS2/3 you provided in github. But when I proceed in workflow advisor with no errors, my interface model is as shown in the second figure. I do not understand why I see this block with all of its input and output ports in the interface model. Eventually, Rx_sig_I, Rx_sig_Q, Tx_sig_I,Tx_sig_Q are all related to sending and receiving data between fpga(ZC702) and FMCOMMS3.I included my interfacing in the workflow as third figure. In this example, these input-output ports do not seem to appear, but ad9361 transmitter and receiver blocks appear. By the way, when I give the signal from arm to FPGA, after processes in the FPGA, data needs to go to FMCOMMS to be transmitted. Does that happen directly between fpga-fmcomms or arm-fmcomms. In the same example, there is a more complex structure I cannot fully understand. Finally, what should I connect to these ports I mentioned? For example, should I use AD936x blocks from simulink library in the interface model?
Thanks in advance,
There are a few things here.
First, if you want to use external mode you must use the support package from here: https://www.mathworks.com/help/supportpkg/xilinxzynqbasedradio/index.html
You should have this already since its required to use the ADI BSP.
With that installed, I need to explain a bit how the different interfaces work. Anything you define as AXI in the Workflow Advisor will be added to your "Software Interface Model", which is that teal subsystem that is generated. Other interfaces (like the IQ streams from the radio) will have dedicated blocks and should appear in the Simulink library created in the "Software Interface Model" step.
Models containing those blocks from the "Software Interface Model" library will actually run on the ARM itself, but with hooks back into Simulink for control and plotting capability. That model needs to be run in "External Mode" from Simulink.
The dedicated radio blocks, which are denoted like "AD936x Receiver" in the linked example, transfer data in a different way and have higher possible data rates. For blocks that use the AXI interfaces will have much slower transfer rates back to Simulink for visualization.
Yes, I have that installed. I understand why AXIs should appear in the interface model. But, why Tx_sig_I appears ? It is as seen in the third figure chosen as AD9361 DAC data I0. Doesnt it indicate that it should go to FMCOMMS3? When it appears in the interface model, I dont know where to connect it. Moreover, how do I set parameters such as center frequency, sampling rate etc.
Which target platform are you using in Workflow Advisor?
Zc702 with fmcomms 2/3 tx&rx
Yes, that is from the ADI BSP which doesn't support External Mode. The software interface model it generates is wrong.