I have to interface the AD7768-EVB with the FPGA part of the Xilinx Ultrascale+ MPSoC.
As first step, I would like open and compile the HDL code for the Zedboard.
Hi,https://wiki.analog.com/resources/eval/user-guides/ad7768-ebz/software/baremetalTake a look at this thread https://ez.analog.com/fpga/f/q-a/98122/fpga-for-dsp-on-adaptive-dynamic-vibration-absorberAt this point, we are not planning to support this project on the newer versions of Vivado. Andrei
Thanks for your reply.
As my second part, interfacing the AD7768-EVB to the Xilinx Ultrascale+ MPSoC :
Hi,Porting to Ultrascale+ should be straight forward. Take a look at https://wiki.analog.com/resources/fpga/docs/hdl/porting_project_quick_start_guide.Andrei