I'm trying to interface basys 3 FPGA board to EVAL-AD7980-PMDZ using SPI.
I was trying to understand example program from analog devices web-page for nexys 3
Demo code is in https://wiki.analog.com/resources/fpga/xilinx/pmod/ad7980
Please help me understand how to go about generating the following libraries in Vivado Design Suite for basys 3. should custom IP packages be created ?
library proc_common_v3_00_a;use proc_common_v3_00_a.proc_common_pkg.all;use proc_common_v3_00_a.ipif_pkg.all;
library axi_lite_ipif_v1_01_a;use axi_lite_ipif_v1_01_a.axi_lite_ipif;
library ad7980_v1_00_a;use ad7980_v1_00_a.user_logic;
That project was created in ISE 14.4. Currently we are not planning to port it to Vivado. What you can do is to use the ad7980 old IP source (https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_lib/edk/pcores/axi_ad7980_v1_00_a) and create a new IP in Vivado and use that in your project.
Or you can use the SPI Engine framework to interface the device : https://wiki.analog.com/resources/fpga/peripherals/spi_engine
I think the ADAQ7980 is quite similar to the AD7980 board (https://wiki.analog.com/resources/eval/user-guides/adaq7980-sdz), so basically you just need to port the project to Basys3.
Thank you for the links. I will try as suggested.
I also a few more questions,
Please help me understand them.
You can get the best support for these question at the High-Precision ADCs sub-community.
After checking out the user guide of the board in my opinion:
1) You should power the board through the 9V wall adapter.
2) From the user guide: "The circuit allows different configurations, input range scaling, filtering, addition of a dc component, and use of different op amp and supplies. The analog input amplifiers are set as unity-gain buffers at the factory."
3) If you truly want to comply to Nyquist - Shannon theory, with the specified sampling rate you should have an input signal of <500kHz.
Hope this helps,