adrv9361-ZC7035 BIST RF loopback

My Goal: I want to receive an RF signal on RX path, apply some signal processing technique and output the result on TX path. 
So, I checked ADRV9361-z7035 loop-back in BIST by enabling (RF RX----> RF TX ) loop back by connecting Signal generator on RX path and Spectrum Analyzer on TX path. It successfully shown the received signal on Tx (Spectrum analyzer) .Note DDS is disable from IIO Oscilloscope, ENSM mode FDD .
  1. With same settings, I connected ILA on ADC data, DAC data and DAC DMA But i found nothing on DAC DMA and DAC FIFO when i checked them through ILA. ILA connections are given below. I was expecting the same data on DAC through DAC DMA as found on ADC data. am i missing something? LA connection as follows

    Probe0              (adc_sync   , fifo_wr_sync)

    Probe1              (adc_valid ,  fifo_wr_en)

    Probe2(63:0)   ( adc_data, fifo_wr_din[63:0] )

    Probe3             (dac_valid , fifo_rd_en)

    Probe4(63:0)  (dac_data , fifo_rd_dout[63:0])

    Probe5             (dout_ovf, fifo_wr,overflow)

    Probe6             (fifo_rd_valid)
  2. what i perceive from this thread ( BIST loop back doesn't follow the FPGA path. Is my understanding right? All i want is loop back by involving FPGA i.e that is providing signal on RX path from Signal generator , captured those signal by ILA(by inserting ILA in RX path) and verify that signal on DAC_out (through ILA ) using HDL reference design provided by ADI (2018_r1).
 Once I verified RX and TX path .After that i will insert some processing core like FFT in that .

Parents Reply
  • Hi,

    DMA data (dac buffer output) must be selected in order to transmit data from the dac interface of the axi_ad9361 core, otherwise, the data transmitted will be from internal sources.

    I tried to select the DMA data and here is the result of my approach.


    We have five data select options and i was not able to find out where is the control of this select pin. So i modified this case statement to always have adc data on dac like this:


    The bit file was generated without any error and the reference design was successfully booted. But the oscilloscope crashes. I have attached the crash report too. 

    IIO-Oscilloscope Crash Info
    PID: 2884
    Signal No: 11
    Signal String: Segmentation fault
    Error No: 0
    Error String: Success
    Time Stamp: Wed Jan 16 05:00:47 2019
    IIO-Oscilloscope Backtrace

    I tired to execute osc from terminal and got this:

    analog@analog:~/Desktop$ osc
    Fontconfig warning: ignoring C.UTF-8: not a valid language tag
    Found plugin: ad9739a
    Found plugin: DAQ1/2/3
    Found plugin: Spectrum Analyzer
    Found plugin: CN0357
    Found plugin: AD6676
    Found plugin: FMCADC3
    Found plugin: SCPI
    Found plugin: FMComms5
    Found plugin: ADRV9009
    Found plugin: AD9371 Advanced
    Found plugin: FMComms1
    Found plugin: AD9371
    Found plugin: FMComms2/3/4
    Found plugin: Debug
    Found plugin: ADRV9009 Advanced
    Found plugin: FMCOMMS11
    Found plugin: AD5628-1
    Found plugin: Motor Control
    Found plugin: AD7303
    Found plugin: FMComms2/3/4/5 Advanced
    Found plugin: DMM
    Found plugin: FMComms6
    Found plugin: Partial Reconfiguration
    A crash report file has been created at: /home/analog/.osc_crash_report
    Segmentation fault

    I tried to run the iiostream.c example to get more insight of the problem and found that rx device could not be acquired by the application. Here the output from ad9361.iiostream.c run.

    analog@analog:/usr/local/src/libiio/examples$ ./ad936analog@analog:/usr/local/src/libiio/examples$ ./ad9361-iiostream
    * Acquiring IIO context
    * Acquiring AD9361 streaming devices
    assertion failed (ad9361-iiostream.c:218)

    Here the ad9361-iiostream.c:218

    Is my approach to select the dac data correct?


    I checked the output of ILA and adc data seems to be there. but oscilloscope is crashing. (not even started).