Hello sir/ ma'am,
I am using Three AD9142a high speed DAC chips at 1500msps data rate. Earlier I used single AD9142a DAC chip on my dater card. That time it was working.
Now we placed two Ad9142a DAC chips on single dater card and one AD9142a DAC chip is placed on another dater card. This two dater cards are placed on one board which has two FMCs upon it and along with 7z045 zynq . i am taking two 375MHz clocks from two FMCs into FPGA and trying to run my logic. As we know , we need to provide DCI and data as inputs to AD9142a DAC chip like that only we are doing.
from FPGA we are generating 3 DCI signals and data through oserdes primitives to these three AD9142a DAC chips.
But sometimes only i am getting three DAC outputs are properly. In the power ON/OFF conditions The output of three DACs are coming along with spurious. sometimes three DAC are working. sometimes anyone of the DAC is misbehaving. i want to get Three DAC outputs are properly in all time. What could be the reason for this issue. How can i solve this issue.
please help me out.
thanks and regards
prasanth
Hello prasanth,
We don't have a reference design for AD9142, so we (fpga reference design group) cannot provide support regarding it.
I think the discussion should be continued on the High Speed DACs forum, where I see you've opened a thread:
https://ez.analog.com/data_converters/high-speed_dacs/f/q-a/104580/using-three-ad9142a-dacs-together-at-1500msps-on-single-board
Regards,
Adrian
An addition to @AdrianC comment, we have an IP for AD9122, which has the same data interface as the AD9142. Feel free to look at it, and see how we generate the DCI on that IP. Maybe the problem will be there.
-Istvan
Hi sir,
as you said, AD9142a and AD9122 are similar kind of chips. When we play with single AD9142a chip. It is working fine. Now we are playing with three AD9142a chips at a time. Here we generate three DCIs signals and data from our FPGA. we just replicated that single AD9142a IP instance as three times. Now we are getting this problem. How can i solve this. Please help me out from this issue.
can i get an IP of AD9122.
-Prasanth
https://github.com/analogdevicesinc/hdl/tree/daq1/library/axi_ad9122
Hello,
It is working when i used the same logic which has taken from AD9122 reference logic for single DAC chip. Now i instantiated same module as three times for 3 DAC chips. Here i am getting a problem. sometimes three DAC outputs are working fine without any spurious. but the power ON/OFF case any one of the DAC is misbehaving. I am unable to get know what could be the reason.
How can i drive this logic for Three DAC chips. please can you help me out from this issue?
Hi,How are you synchronizing the devices?Are you using the same clock for all ad9122 cores in the fpga? (if yes, that is bad)It may be just an initialization issue(calibration). take a look at the old fmcomms1 project (hdl_2016_r1 and 2016_R1)
Andrei