Adding IPs to the reference HDL design for zedboard SDR evaluation kit

Hi, I am doing project on zedboard integrated with AD-FMCOMMS2-EBZ of Analog Devices.

What I am trying to do is basically adding my own IPs within the reference HDL design provided here(https://github.com/analogdevicesinc/hdl).

For simple test, I added BRAM block within the design and tried to access it from PS by using 'mmap'.

However, it resulted in SIGBUS error which means the address of BRAM is not valid.

All the other blocks connected with PS through AXI Interconnect work well. I can access to those blocks without any problems.

But only my custom block cannot be accessed from PS.

(I just added my own block to the design, generated bitstream, and exported to hdf file)

 

I would really appreciate any advice for my problem.

Thanks ahead of time!