ADRV9009 supports mode "ORX and RX datapath using the same framer". As I understand, they will use the same physical lanes to transport data to FPGA.
But, in FPGA, one RX_PHY is only mapped to either RX or ORX. So, my question is: "does FPGA reference design of ADI support that mode?"
Thanks in advance,Trung Nguyen
it does not supports that, you need separate physical lanes and framers for each path. Please correct me AdrianC
We haven't tested the mode and it currently is not supported by the HDL reference design. We'll investigate and let you know if it's easy to implement.