Square wave output using fmcdaq2

Hi,

I'm confused, ad9144 is a high speed dac (1GSPS), why do you want it to output a squarewave of 1KHz?
The daq2 board has some filters on the output, you will have to change those to be able to transmit a sqare wave.

Take a look at https://ez.analog.com/fpga/f/q-a/81027/daq2-kcu105-send-data-to-dac

Are you familiar with our RF designs? If not, it may be of interest to you.

www.analog.com/en/products/adrv9008-2.html

www.analog.com/.../ad9361.html
wiki.analog.com/.../adrv936x_rfsom

Andrei

Thank you，Andrei

I am sorry for confusing you．I wanted to generate a square wave of 1 kHz because the modulator used operates by inputting a square wave of about 1 kHz to 2 kHz.

However, since the ADC/DAC I have is fmcdaq2, I would like to know haw to output a 1 kHz Square wave using fmcdaq2.

I'm sorry. I looked at https://ez.analog.com/fpga/f/q-a/81027/daq2-kcu105-send-data-to-dac and I saw the URL and could understand changing the filter of fmcdaq2, but I could not understand which part to change specifically.

Please tell me．

Yuta

Hi, thank you for your reply.

There is not any change in hardware or clock / rate that I do not mention.

There is no ILA in my system. Should I add ILA? Please tell me how to add if I should add ILA.

I will try to start with a new workspace hdl_2018_r1 and no-Os 2018_r1.

Yuta

Hi,

Don't add any ILA's.
Can you make a testbench and simulate the square wave generator?

Andrei

Hi,

I understood not adding ILA.
Since I have not made a test bench, I am not simulating a square wave generator.
I will try to create the test bench.

Yuta

Hi, 

I tried to start with a new workspace hdl_2018_r1 and no-Os 2018_r1.

As a result of the execution, no error appeared on the UART screen, but the waveform was still not output.

And I tried creating a test bench, but I could not make it well. How should I change it?

//square_wave.v


`timescale 1ns / 1ps

module square_wave(
CLK,
increment,
dout
);
input  CLK;
input [31:0]  increment;
reg  [15:0]  wave = 0;
reg  [15:0]  sawtooth_wave = 'd0;
output dout;

always @(posedge CLK)begin
  sawtooth_wave <= sawtooth_wave + increment;
  wave <= {16{sawtooth_wave[31]}};
end

square_wave i_square_wave(
CLK,
increment,
//wave,
//sawtooth_wave,
dout
);
endmodule

//square_wave_tb.v  //testbench

`timescale 1ns / 1ps
 

module square_wave_tb();
reg          CLK;
reg  [31:0]  increment;
reg  [15:0]  wave = 0;
reg  [15:0]  sawtooth_wave = 'd0;
wire dout;
square_wave i_square_wave(
.CLK (CLK),
.increment (increment),
.wave (wave),
.sawtooth_wave (sawtooth_wave),
.dout (dout)
);

always
  begin
    #50 CLK =~CLK;
  end
   
always @(posedge CLK)begin
  sawtooth_wave <= sawtooth_wave + increment;
  wave <= {16{sawtooth_wave[31]}};
end

endmodule

Yuta

Hi,

Use 16 bits for increment.
Fix sawtooth_wave[31], you only have 16 bits there.

Andrei

Hi, Thank you for your reply.

I had a lot of misunderstandings.
After changing the bit number to 16, I improved the testbench and it worked correctly.

I checked the NCO implemented in axi_ad 9144_channel.v on the test bench before, but square wave output was not obtained. Therefore I think that I failed even if I reworked the workspace.

I changed the increment to "16'd1" and simulated the test bench. As a result, it was confirmed that the square wave was outputted on the simulation.

Like the testbench, I added these to axi_ad 9144_channel.v, changed sawtooth_wave to dac_dds_phase_0_0, then built again, but the following error occurred.

*** Running vivado
    with args -log system_top.vdi -applog -m64 -product Vivado -messageDb vivado.pb -mode batch -source system_top.tcl -notrace


****** Vivado v2017.4.1 (64-bit)
  **** SW Build 2117270 on Tue Jan 30 15:31:13 MST 2018
  **** IP Build 2095745 on Tue Jan 30 17:13:15 MST 2018
    ** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.

source system_top.tcl -notrace
Command: open_checkpoint /home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.runs/impl_1/system_top.dcp

Starting open_checkpoint Task

Time (s): cpu = 00:00:00.04 ; elapsed = 00:00:00.10 . Memory (MB): peak = 1159.902 ; gain = 0.000 ; free physical = 1330 ; free virtual = 4428
INFO: [Netlist 29-17] Analyzing 5575 Unisim elements for replacement
INFO: [Netlist 29-28] Unisim Transformation completed in 1 CPU seconds
INFO: [Project 1-479] Netlist was created with Vivado 2017.4.1
INFO: [Device 21-403] Loading part xc7vx485tffg1761-2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.runs/impl_1/.Xil/Vivado-22481-aoyagi-VirtualBox/dcp1/system_top_board.xdc]
Finished Parsing XDC File [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.runs/impl_1/.Xil/Vivado-22481-aoyagi-VirtualBox/dcp1/system_top_board.xdc]
Parsing XDC File [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.runs/impl_1/.Xil/Vivado-22481-aoyagi-VirtualBox/dcp1/system_top_early.xdc]
INFO: [Timing 38-35] Done setting XDC timing constraints. [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.srcs/sources_1/bd/system/ip/system_sys_mb_debug_0/system_sys_mb_debug_0.xdc:50]
get_clocks: Time (s): cpu = 00:00:18 ; elapsed = 00:00:40 . Memory (MB): peak = 2698.164 ; gain = 712.832 ; free physical = 131 ; free virtual = 3028
INFO: [Timing 38-2] Deriving generated clocks [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.srcs/sources_1/bd/system/ip/system_axi_ethernet_0/bd_0/ip/ip_2/synth/bd_55cd_pcs_pma_0.xdc:42]
Finished Parsing XDC File [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.runs/impl_1/.Xil/Vivado-22481-aoyagi-VirtualBox/dcp1/system_top_early.xdc]
Parsing XDC File [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.runs/impl_1/.Xil/Vivado-22481-aoyagi-VirtualBox/dcp1/system_top.xdc]
Finished Parsing XDC File [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.runs/impl_1/.Xil/Vivado-22481-aoyagi-VirtualBox/dcp1/system_top.xdc]
Parsing XDC File [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.runs/impl_1/.Xil/Vivado-22481-aoyagi-VirtualBox/dcp1/system_top_late.xdc]
Finished Parsing XDC File [/home/aoyagi/work/square_8/hdl/projects/daq2/vc707/daq2_vc707.runs/impl_1/.Xil/Vivado-22481-aoyagi-VirtualBox/dcp1/system_top_late.xdc]
Reading XDEF placement.
Reading placer database...
Reading XDEF routing.
Read XDEF File: Time (s): cpu = 00:00:00.12 ; elapsed = 00:00:00.41 . Memory (MB): peak = 2822.234 ; gain = 0.000 ; free physical = 175 ; free virtual = 2975
Restored from archive | CPU: 0.130000 secs | Memory: 0.013687 MB |
Finished XDEF File Restore: Time (s): cpu = 00:00:00.12 ; elapsed = 00:00:00.42 . Memory (MB): peak = 2822.234 ; gain = 0.000 ; free physical = 175 ; free virtual = 2975
INFO: [Project 1-111] Unisim Transformation Summary:
  A total of 1148 instances were transformed.
  IOBUF => IOBUF (IBUF, OBUFT): 57 instances
  IOBUFDS_DIFF_OUT_DCIEN => IOBUFDS_DIFF_OUT_DCIEN (IBUFDS_IBUFDISABLE_INT, IBUFDS_IBUFDISABLE_INT, INV, OBUFTDS_DCIEN, OBUFTDS_DCIEN): 8 instances
  IOBUF_DCIEN => IOBUF_DCIEN (IBUF_IBUFDISABLE, OBUFT_DCIEN): 64 instances
  LUT6_2 => LUT6_2 (LUT5, LUT6): 108 instances
  OBUFDS => OBUFDS_DUAL_BUF (INV, OBUFDS, OBUFDS): 1 instances
  RAM32M => RAM32M (RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMS32, RAMS32): 649 instances
  RAM32X1D => RAM32X1D (RAMD32, RAMD32): 32 instances
  RAM64M => RAM64M (RAMD64E, RAMD64E, RAMD64E, RAMD64E): 69 instances
  RAM64X1D => RAM64X1D (RAMD64E, RAMD64E): 160 instances

INFO: [Project 1-604] Checkpoint was created with Vivado v2017.4.1 (64-bit) build 2117270
open_checkpoint: Time (s): cpu = 00:01:05 ; elapsed = 00:03:05 . Memory (MB): peak = 2822.234 ; gain = 1662.332 ; free physical = 217 ; free virtual = 3014
Command: opt_design
Attempting to get a license for feature 'Implementation' and/or device 'xc7vx485t'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7vx485t'
INFO: [Common 17-86] Your Implementation license expires in 3 day(s)
INFO: [Common 17-1223] The version limit for your license is '2018.11' and will expire in 5 days. A version limit expiration means that, although you may be able to continue to use the current version of tools or IP with this license, you will not be eligible for any updates or new releases.
Running DRC as a precondition to command opt_design

Starting DRC Task
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[0] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[0]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[0]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[10] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[10]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[10]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[11] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[11]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[11]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[12] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[12]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[12]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[13] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[13]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[13]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[14] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[14]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[14]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[15] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[15]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[15]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[1] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[1]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[1]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[2] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[2]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[2]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[3] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[3]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[3]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[4] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[4]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[4]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[5] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[5]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[5]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[6] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[6]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[6]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[7] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[7]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[7]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[8] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[8]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[8]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0[9] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[9]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_0/dac_dds_phase_0_0_reg[9]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[0] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[0]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[0]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[10] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[10]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[10]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[11] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[11]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[11]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[12] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[12]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[12]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[13] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[13]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[13]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[14] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[14]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[14]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[15] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[15]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[15]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[1] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[1]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[1]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[2] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[2]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[2]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[3] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[3]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[3]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[4] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[4]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[4]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[5] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[5]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[5]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[6] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[6]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[6]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[7] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[7]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[7]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[8] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[8]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[8]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0[9] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[9]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_1/dac_dds_phase_0_0_reg[9]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[0] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[0]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[0]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[10] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[10]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[10]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[11] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[11]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[11]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[12] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[12]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[12]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[13] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[13]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[13]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[14] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[14]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[14]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[15] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[15]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[15]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[1] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[1]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[1]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[2] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[2]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[2]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[3] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[3]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[3]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[4] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[4]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[4]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[5] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[5]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[5]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[6] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[6]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[6]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[7] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[7]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[7]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[8] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[8]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[8]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0[9] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[9]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_2/dac_dds_phase_0_0_reg[9]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[0] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[0]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[0]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[10] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[10]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[10]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[11] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[11]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[11]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[12] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[12]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[12]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[13] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[13]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[13]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[14] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[14]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[14]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[15] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[15]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[15]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[1] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[1]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[1]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[2] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[2]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[2]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[3] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[3]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[3]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[4] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[4]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[4]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[5] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[5]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[5]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[6] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[6]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[6]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[7] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[7]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[7]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[8] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[8]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[8]__0/Q.
ERROR: [DRC MDRV-1] Multiple Driver Nets: Net i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0[9] has multiple drivers: i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[9]/Q, and i_system_wrapper/system_i/axi_ad9144_core/inst/i_core/i_channel_3/dac_dds_phase_0_0_reg[9]__0/Q.
INFO: [Project 1-461] DRC finished with 64 Errors
INFO: [Project 1-462] Please refer to the DRC report (report_drc) for more information.
ERROR: [Vivado_Tcl 4-78] Error(s) found during DRC. Opt_design not run.

Time (s): cpu = 00:00:00.73 ; elapsed = 00:00:01 . Memory (MB): peak = 2830.238 ; gain = 8.000 ; free physical = 205 ; free virtual = 3011
INFO: [Common 17-83] Releasing license: Implementation
15 Infos, 0 Warnings, 0 Critical Warnings and 65 Errors encountered.
opt_design failed
ERROR: [Common 17-39] 'opt_design' failed due to earlier errors.

INFO: [Common 17-206] Exiting Vivado at Sun Nov 25 01:22:07 2018...
[Sun Nov 25 01:22:10 2018] impl_1 finished
wait_on_run: Time (s): cpu = 00:01:18 ; elapsed = 00:03:41 . Memory (MB): peak = 3424.977 ; gain = 0.000 ; free physical = 1799 ; free virtual = 4636
ERROR: [Common 17-69] Command failed: Run 'impl_1' failed. Unable to open
INFO: [Common 17-206] Exiting Vivado at Sun Nov 25 01:22:14 2018...

What is wrong?

Yuta

Hi Yuta,

The axi_ad9144_core runs at 250 MHz for maximum sampling rate (1GHz), this means to keep up with the DAC you must have 4 parallel data paths.

I see some strange errors in your code.
This is a diff to something I've written, that has built successfully.

diff --git a/library/axi_ad9144/axi_ad9144_channel.v b/library/axi_ad9144/axi_ad9144_channel.v
index 75635a40..5a93392c 100644
--- a/library/axi_ad9144/axi_ad9144_channel.v
+++ b/library/axi_ad9144/axi_ad9144_channel.v
@@ -82,6 +82,10 @@ module axi_ad9144_channel #(
   reg     [15:0]  dac_dds_incr_0 = 'd0;
   reg     [15:0]  dac_dds_incr_1 = 'd0;
   reg     [63:0]  dac_dds_data = 'd0;
+  reg     [15:0]  square_wave_0 = 'd0;
+  reg     [15:0]  square_wave_1 = 'd0;
+  reg     [15:0]  square_wave_2 = 'd0;
+  reg     [15:0]  square_wave_3 = 'd0;
 
   // internal signals
 
@@ -176,7 +180,7 @@ module axi_ad9144_channel #(
       pn7 = dout;
     end
   endfunction
-  
+
   // PN15 function
 
   function [63:0] pn15;
@@ -266,7 +270,7 @@ module axi_ad9144_channel #(
       4'h6: dac_data <= dac_pn7_data_s;
       4'h5: dac_data <= dac_pn15_data_i_s;
       4'h4: dac_data <= dac_pn7_data_i_s;
-      4'h3: dac_data <= 64'd0;
+      4'h3: dac_data <= {square_wave_3,square_wave_2,square_wave_1,square_wave_0};
       4'h2: dac_data <= dma_data;
       4'h1: dac_data <= { dac_pat_data_2_s, dac_pat_data_1_s,
                           dac_pat_data_2_s, dac_pat_data_1_s};
@@ -286,6 +290,13 @@ module axi_ad9144_channel #(
     end
   end
 
+  always @(posedge dac_clk) begin
+    square_wave_0 <= {16{dac_dds_phase_0_0[15]}};
+    square_wave_1 <= {16{dac_dds_phase_1_0[15]}};
+    square_wave_2 <= {16{dac_dds_phase_2_0[15]}};
+    square_wave_3 <= {16{dac_dds_phase_3_0[15]}};
+  end
+
   // dds
 
   always @(posedge dac_clk) begin
@@ -331,7 +342,7 @@ module axi_ad9144_channel #(
     .dds_data (dac_dds_data_0_s));
   end
   endgenerate
-  
+
   generate
   if (DATAPATH_DISABLE == 1) begin
   assign dac_dds_data_1_s = 16'd0;
@@ -346,7 +357,7 @@ module axi_ad9144_channel #(

Can you compare what you have whit this, and let me know if have questions about it.

Andrei

Hi, Andrei

I made corrections with reference to your program.
As a result of building, I succeeded in building.

I ran it with SDK in the same way as before.

Then the following waveform was output.
It was a waveform that was not  the square wave.

What should I do?

Yuta

Hi,

Have you simulated the code?
At what frequency have you set the DDS, try more frequency ranges....
What changes have you done to the analog side of the daq2?

Andrei

Hi,

Have you simulated the code?
At what frequency have you set the DDS, try more frequency ranges....
What changes have you done to the analog side of the daq2?

Andrei

Hi,

I simulated the code.

The result is shown below." reg [15: 0] increment " is assigned 'd1.

The picture I placed before was 1 GHz.

There was nothing in the UART message.

The figure below is at 500 MHz.

The figure below is for 600 MHz.

Furthermore, as increment, the same waveform was output as the result of building with dac_dds_incr_ 0 = 'd 0; with dac_dds_incr_ 0 =' d 1; of axi_ad9144_channel.v.

The analog part has not changed anything. It connects directly to the oscilloscope from the SMA of fmcdaq 2 and outputs it.

Yuta

Furthermore, change the increment to dac_dds_incr_ 0 = 'd 0 to dac_dds_incr_ 0 =' d 1 of github.com/.../hdl_2018_r 1/library/axi_ad 9144/axi_ad 9144 _channel.v # L 82, and the result of outputting the waveform , A similar waveform was output. Is this correct? Z

The above URL was here ：　https://github.com/analogdevicesinc/hdl/blob/hdl_2018_r1/library/axi_ad9144/axi_ad9144_channel.v#L82

Also, the waveform at 500 MHz was shown below. I'm sorry.

Hi,

You are changing the sampling rate, I was referring to the DDS frequency.

github.com/.../fmcdaq2.c
github.com/.../fmcdaq2.c

Andrei

Hi，

How do I change github.com/.../fmcdaq2.c the sampling rate?

Although it lowered, it did not work well and an error appeared.

Also, although the DDS was set to a lower frequency, the same waveform was output. We tried at multiple frequencies (eg 1 Hz, 1 kHz, 1 MHz etc) but the waveform did not change at all. What could be the cause?

Yuta

Hi,

Yes, the magic happens here https://github.com/analogdevicesinc/no-OS/blob/master/fmcdaq2/fmcdaq2.c#L105-L235

Use the DDS (sinewave), look at those signals do things change?
The filter on the output of daq2 not being designed for squarewave signals.

Andrei

I tried various things. As a result, the waveform output as shown below was obtained.
Thank you very much.

Things like oscillation can be seen in the HIGH part, is this due to the  filter on daq2?

Hi,

As a result of further trials, the oscillating part disappeared. Thank you very much.

Yuta

Hi,

Out of curiosity, why have you insisted on using the ad9144's output for a low-frequency square wave, taking into consideration the physical changes that had to be made?

Andrei

Hi, Andrei.

It was necessary to be low frequency due to the relationship of the devices used for the current communication system.
In the future, when the performance of the device improved and it became possible to cope with high frequencies, I wanted to be able to vary only the frequency without changing the environment to use.

Yuta