Q&A - FPGA Reference Designs

Q&A

Not Answered

ZCU102 + ADRV9002, Prebuilt SD Card 0

22 views

1 reply
on 17 Apr 2021
by travisfcollins
Answered

AD9467 Native FMC Card / Xilinx Reference Desig +1

166 views

8 replies
on 16 Apr 2021
by AdrianC
Not Answered

Removing excess modules in FMCOMMS3 reference HDL 0

200 views

7 replies
on 16 Apr 2021
by andrei_g
Not Answered

AXI ADRV9001 IP for FM Deviation Mode 0

26 views

1 reply
on 16 Apr 2021
by lnagy
Not Answered

util_adxcvr 0

32 views

1 reply
on 16 Apr 2021
by dan.hotoleanu
Not Answered

ZCU102-ADRV9002 0

121 views

11 replies
on 15 Apr 2021
by travisfcollins
Not Answered

AD9361 Filter Design: Low TX RF Bandwidth 0

203 views

20 replies
on 15 Apr 2021
by travisfcollins
Not Answered

FPGA Utilizations of BRAM for JESD204 Interface Framework? 0

41 views

3 replies
on 15 Apr 2021
by lnagy
Answered

Build Zynq boot Image with debug probes 0

438 views

7 replies

on 15 Apr 2021 by citizenkoehn
Not Answered

AD936x SOM & BOB documentation conflict 0

50 views

3 replies
on 15 Apr 2021
by hflorin
Not Answered

AD9371 JESD204 Link Setup Failed 0

29 views

2 replies

on 15 Apr 2021 by serkancan
Not Answered

is ADRV9361-Z7035 recommended for new designs 0

45 views

2 replies
on 15 Apr 2021
by rgetz
Not Answered

HDL requirements for IIO Driver support 0

37 views

1 reply
on 14 Apr 2021
by AdrianC
Not Answered

Custom board with 2 AD9361 and problem with IODELAY GROUP 0

119 views

9 replies
on 14 Apr 2021
by lnagy
Suggested Answer

No RF signal of AD9371 bring up 0

97 views

5 replies
on 14 Apr 2021
by AdrianC
Not Answered

DIVIDE DMA TX PATH 0

255 views

8 replies
on 14 Apr 2021
by AdrianC
Not Answered

ADRV9361 SOM power failure 0

143 views

4 replies
on 13 Apr 2021
by MihaiS
Not Answered

ADRV9361 RF SoM AD9361_CLK *LEVEL* 0

59 views

3 replies
on 13 Apr 2021
by hflorin
Not Answered

Adi_jesd204 ip core reference clock 0

34 views

2 replies
on 13 Apr 2021
by AdrianC
Not Answered

AD9371 ILAS reboot 0

89 views

4 replies
on 13 Apr 2021
by lnagy