Not Answered

Using stream mode for Rx DMA on ADRV9009ZU11EG/ADRV2CRR 0

146 views

12 replies

on 27 Jan 2021 by mamad2
Not Answered

fmcomms8 reduce Tx lanes from 8 to 4, tx status remains in CGS state +1

157 views

12 replies
on 27 Jan 2021
by AdrianC
Answered

Documentation regarding implemenation of DDS (Transport layer) in FPGA Reference design. 0

72 views

3 replies
on 27 Jan 2021
by andrei_g
Not Answered

HDL Workflow with the Frequency Hopping Example for ADI RF SOM 0

71 views

5 replies
on 27 Jan 2021
by travisfcollins
Not Answered

Any examples of JESD PHY DRP configuration? 0

67 views

3 replies
on 26 Jan 2021
by AdrianC
Not Answered

registration process with zc706 and ad9361 failed 0

51 views

2 replies
on 26 Jan 2021
by travisfcollins
Not Answered

About Non Deterministic Delay/Latency in FMCOMMS2 HDL Reference Design 0

29 views

0 replies

on 26 Jan 2021 by emincetin
Not Answered

ADRV1CRR-FMC 1.8V for Ethernet PHY 0

44 views

1 reply
on 26 Jan 2021
by mihai.bancisor@analog.com
Not Answered

ADRV9009-ZU11EG SOM bypass IOs from ADP5054 on carrier +1

85 views

3 replies
on 25 Jan 2021
by mihai.bancisor@analog.com
Not Answered

Regarding LDO current rating in adrv9009-zu11eg evaluation board schematic 0

79 views

1 reply
on 25 Jan 2021
by mihai.bancisor@analog.com
Not Answered

SD card boot files for AD9082 with ZCU102 +1

36 views

1 reply
on 25 Jan 2021
by lnagy
Not Answered

ERROR building the Pluto HDL project 0

61 views

2 replies
on 25 Jan 2021
by sarpadi
Suggested Answer

Driver VHDL for PmodDA3 0

107 views

5 replies

on 23 Jan 2021 by pietrodcs
Answered

hdl_2019_r2 branch +2

152 views

2 replies

on 21 Jan 2021 by MJensen984
Answered

HDL build failed : Run 'synth_1' failed. Unable to open 0

67 views

1 reply

on 21 Jan 2021 by Anojh
Answered

QPSK HDL Example Data Represantation 0

84 views

2 replies

on 21 Jan 2021 by spectrum9000
Answered

Generating Barker code using HW +1

1000 views

9 replies

on 21 Jan 2021 by Datpt
Suggested Answer

Settings to be done in hdl 2018_r2 for 491MHz profile 0

248 views

9 replies
on 20 Jan 2021
by DragosB
Not Answered

about no_OS axi_dmac driver 0

131 views

7 replies
on 20 Jan 2021
by mchindris
Suggested Answer

Pin out on the constraint file for the 706 /AD9371 board 0

83 views

3 replies
on 20 Jan 2021
by andrei_g