FPGA Reference Designs

Q&A

by engineer882
FPGA Reference Designs

Latest 23 hours ago by Stanca
46 1 0
Not Answered
Modify Block Diagram with ILA 0
Not Answered

Hi, I am going through the ADI HDL guide http://analogdevicesinc.github.io/hdl/ for my board: The ADRV9361-Z7035 with FMC carrier. I have programmed some software on the Kuiper Linux image, and would like to bring an ILA into the Vivado block diagram...

software

46 1 0
by nmutech
FPGA Reference Designs

Latest 2 days ago by nmutech
87 2 0
Not Answered
Data Offload bypass mode and ddr mode usage issues 0
Not Answered

Hi, I am currently using a ZCU102 together with the AD9172 evaluation board(dac_fmc_ebz) . I am trying to use the bypass mode of the Data Offload IP , but I am not able to generate signals correctly in hardware. I have been looking for documentation...

Standard High Speed D/A Converters hardware High Speed D/A Converters =30MSPS dac_fmc_ebz reference design hdl ad9172 fpga Show More

87 2 0
by Xain
FPGA Reference Designs

Latest 5 days ago by Xain
176 4 0
Answered
changing daq frequency 0
Answered

I am using FMCDAQ2 with kc705. I am using 2019r2 noOS and the reference design for same release. the reference design is working perfect. I made some changes in the no OS to change the DAC frequency to 975 MHz instead of 1GHz. the ad9523 has been configured...

Clock Generation Devices Standard High Speed D/A Converters Clock Generation and Distribution software High Speed D/A Converters =30MSPS ad9144 2019.1 Show More

176 4 0
by madhu90
FPGA Reference Designs

Latest 5 days ago by JMMina
196 4 0
Answered
AD9154-FMC-EBZ + ZCU102 => Ref RF signal input @ J1 doubt +1
Answered

Hi, I am working on integrating AD9154-FMC-EBZ Eval board with Xilinx ZCU102. This user-guide recommends feeding 1.5GHz RF sine signal @ J1 => EVALUATING THE AD9154 DIGITAL-TO-ANALOG CONVERTER [Analog Devices Wiki] However, I found out from the...

Standard High Speed D/A Converters Kuiper software Integer-N PLL zcu102 High Speed D/A Converters =30MSPS ad9154 Show More

196 4 0
by svvv25
FPGA Reference Designs

Latest 5 days ago by svvv25
79 2 0
Not Answered
Issue Connecting Custom CW Generator to DAC FIFO in ADRV9364Z7020 Reference Design 0
Not Answered

I am new to working with the ADRV9364Z7020 board and its reference design. In the current reference design, I am trying to connect my custom CW signal generator inside the HDL and route it to the DAC FIFO . However, on the TX channel , I am not observing...

hardware

79 2 0
by SogangUniversity
FPGA Reference Designs

Latest 5 days ago by GenevaC
124 3 0
Answered
CML LVDS Interface +1
Answered

Hi, I’m currently working on the interface between a high-speed comparator and an FPGA, and I’m a bit unsure about the output interface. The input signal comes from a balun, and I’m planning to feed the comparator outputs into the FPGA. According to...

hardware adcmp580 High Speed Comparators (<100ns Propagation Delay) comparators

124 3 0
by raiki
FPGA Reference Designs

Latest 6 days ago by andrei_g
135 2 0
Not Answered
Intermittent TX and RX data glitches when using custom modulator in AD9361 HDL (DMA removed) 0
Not Answered

I am modifying the AD9361 HDL reference design by removing the AXI DMA TX path and inserting a custom modulator that directly drives the TX datapath. Clocking and Data Generation Details A 100 MHz PS clock is used as a base clock This clock...

hardware ad9361 Wideband Transceiver IC RF Integrated Transceivers

135 2 0
by hmd
FPGA Reference Designs

Latest 6 days ago by elenahadarau
103 3 0
Not Answered
FMCDAQ3-EBZ and VC707 BOARD PORTING? 0
Not Answered

Hi All, I really need your suggestions for the project I joined recently. I have VC707 BOARD with FMCDAQ3-EBZ but whwn I checkhed repo I was not able to find the reference design for VC707 so that I think the only way to work with this setup is porting...

hardware

103 3 0
by wuxiangzhi
FPGA Reference Designs

Latest 16 days ago by zhang0111011
228 2 0
Answered
Does ADI new generation of FMCMOTCON2? 0
Answered

Hello Support Team Guys, Because FMCMOTCON2 is OBSOLETE, would you please let us know if ADI has the replacement for it? Thanks & Best regards, xiangzhi wu

hardware fmcmotcon2

228 2 0
by SumanthAD9361
FPGA Reference Designs

Latest 28 days ago by CapotaBianca
282 4 0
Answered
GPIO assistance +1
Answered

I am an absolute beginner to FPGAs. I'm using ADRV9361-Z7035 SoM with the ADRVCRR1-FMC carrier. My vivado and vitis are both version 2022.2. My OS is Red Hat Linux. Using github I've managed to create both the VIVADO block diagram and the VITIS environment...

adrv9361-z7035 Vivado 2022.2 hardware ad9361 ccfmc lvds Wideband Transceiver IC adrvcrr1-fmc RF Integrated Transceivers Show More

282 4 0
by mozhoudonglu
FPGA Reference Designs

Latest 29 days ago by CapotaBianca
179 1 0
Not Answered
questions about orx channels of adrv9029 0
Not Answered

Hi I'm testing the orx channels of adrv9029, the control method of orx was switched to dual channl with 4 pin mode by: { "radioCtrlInit": { "radioCtrlModeCfg": { "txRadioCtrlModeCfg": { "txEnableMode": 1, "txChannelMask": 15 }, "rxRadioCtrlModeCfg...

software ADRV9029 2022r2 Wideband Transceiver IC RF Integrated Transceivers Show More

179 1 0
by bleudoutremer
FPGA Reference Designs

Latest 1 month ago by Stanca
1007 24 0
Not Answered
Noisy Input from EVAL-ADAQ23878 0
Not Answered

Hi, When testing ADAQ23878-EVAL with the onboard +2P5V output from ADP7118, the voltages I get are quite noisy. Sampling rate is fixed at 8.33MSps, generated by the onboard ADC_PLL_CNV by configuring AD9513 (this is the max I could get and still get...

adc high speed adc Datasheet/Specs Clock Generation and Distribution Clock Distribution Devices EVAL-ADAQ23878 noise High Speed A/D Converters >10 MSPS LDO Linear Regulators Precision A/D Converters Positive Linear Regulators (LDO) Show More

1007 24 0
by Sarava
FPGA Reference Designs

Latest 1 month ago by CapotaBianca
319 6 0
Answered
HDL repositories for interfacing AD9695 with Intel FPGA 0
Answered

Greetings Support Team, We have purchased an AD9695 EVK board and want it to interface with an Intel/Altera FPGA board but could not been able to find any HDL repositories to build for this device. I am unable to find any JESD based devices like AD9208...

hdl reference design software fpga adc interface ad9695 ad9695-1300 High Speed A/D Converters >10 MSPS Standard High Speed A/D Converters Show More

319 6 0
by mostrowski
FPGA Reference Designs

Latest 1 month ago by mandrica
255 6 0
Answered
Adding audio DAC to ADRV9002+ZC706 reference design 0
Answered

Hello everyone I am currently preparing to conduct evaluation of ADRV9002 transceiver, specifically EVAL-ADRV9002 FMC module in ZC706 board. I would like to push audio samples (after demodulation) to external DAC, because ZC706 does not possess such...

hardware zc706 ADRV9002 Wideband Transceiver IC RF Integrated Transceivers Show More

255 6 0
by Socchiplet
FPGA Reference Designs

Latest 1 month ago by Socchiplet
1240 28 0
Answered
adrv9026 +ZCU102 HDL no-OS reference design (Vivado) +1
Answered

I have successfully build and generated bit stream for adrv9026 +ZCU102 VIvado 2024.2 reference design However, looking at the design I noticed there does not seems to be support for Orx data to FPGA. Only Tx and Rx paths are there. I can see that...

ADRV9026 hardware Wideband Transceiver IC RF Integrated Transceivers

1240 28 0

Popular Forums

Product Forums

Application Forums

Design Center Forums

Highlighted Webinar

Places

Libraries

Latest Webinars

Challenge Yourself!

What's Brewing

Places

Resources

Highlighted Blogs

Latest Blogs

ADI Blogs

Visit ContentZone

Featured Content

View Content By Industry

View Content By Technology

Q&A

Not Answered
Modify Block Diagram with ILA 0
Not Answered

Not Answered
Data Offload bypass mode and ddr mode usage issues 0
Not Answered

Answered
changing daq frequency 0
Answered

Answered
AD9154-FMC-EBZ + ZCU102 => Ref RF signal input @ J1 doubt +1
Answered

Not Answered
Issue Connecting Custom CW Generator to DAC FIFO in ADRV9364Z7020 Reference Design 0
Not Answered

Answered
CML LVDS Interface +1
Answered

Not Answered
Intermittent TX and RX data glitches when using custom modulator in AD9361 HDL (DMA removed) 0
Not Answered

Not Answered
FMCDAQ3-EBZ and VC707 BOARD PORTING? 0
Not Answered

Answered
Does ADI new generation of FMCMOTCON2? 0
Answered

Answered
GPIO assistance +1
Answered

Not Answered
questions about orx channels of adrv9029 0
Not Answered

Not Answered
Noisy Input from EVAL-ADAQ23878 0
Not Answered

Answered
HDL repositories for interfacing AD9695 with Intel FPGA 0
Answered

Answered
Adding audio DAC to ADRV9002+ZC706 reference design 0
Answered

Answered
adrv9026 +ZCU102 HDL no-OS reference design (Vivado) +1
Answered

Q&A

Not Answered Modify Block Diagram with ILA 0 Not Answered

Not Answered Data Offload bypass mode and ddr mode usage issues 0 Not Answered

Answered changing daq frequency 0 Answered

Answered AD9154-FMC-EBZ + ZCU102 => Ref RF signal input @ J1 doubt +1 Answered

Not Answered Issue Connecting Custom CW Generator to DAC FIFO in ADRV9364Z7020 Reference Design 0 Not Answered

Answered CML LVDS Interface +1 Answered

Not Answered Intermittent TX and RX data glitches when using custom modulator in AD9361 HDL (DMA removed) 0 Not Answered

Not Answered FMCDAQ3-EBZ and VC707 BOARD PORTING? 0 Not Answered

Answered Does ADI new generation of FMCMOTCON2? 0 Answered

Answered GPIO assistance +1 Answered

Not Answered questions about orx channels of adrv9029 0 Not Answered

Not Answered Noisy Input from EVAL-ADAQ23878 0 Not Answered

Answered HDL repositories for interfacing AD9695 with Intel FPGA 0 Answered

Answered Adding audio DAC to ADRV9002+ZC706 reference design 0 Answered

Answered adrv9026 +ZCU102 HDL no-OS reference design (Vivado) +1 Answered

Not Answered
Modify Block Diagram with ILA 0
Not Answered

Not Answered
Data Offload bypass mode and ddr mode usage issues 0
Not Answered

Answered
changing daq frequency 0
Answered

Answered
AD9154-FMC-EBZ + ZCU102 => Ref RF signal input @ J1 doubt +1
Answered

Not Answered
Issue Connecting Custom CW Generator to DAC FIFO in ADRV9364Z7020 Reference Design 0
Not Answered

Answered
CML LVDS Interface +1
Answered

Not Answered
Intermittent TX and RX data glitches when using custom modulator in AD9361 HDL (DMA removed) 0
Not Answered

Not Answered
FMCDAQ3-EBZ and VC707 BOARD PORTING? 0
Not Answered

Answered
Does ADI new generation of FMCMOTCON2? 0
Answered

Answered
GPIO assistance +1
Answered

Not Answered
questions about orx channels of adrv9029 0
Not Answered

Not Answered
Noisy Input from EVAL-ADAQ23878 0
Not Answered

Answered
HDL repositories for interfacing AD9695 with Intel FPGA 0
Answered

Answered
Adding audio DAC to ADRV9002+ZC706 reference design 0
Answered

Answered
adrv9026 +ZCU102 HDL no-OS reference design (Vivado) +1
Answered