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Frequently Asked
QPLL support in axi_adxcvr and util_adxcvr
Answered
over 3 years ago
AD9361 HDL - Inserting a FFT into the block design
Answered
over 3 years ago
Zynq3-AD9371 Radar
Answered
over 2 years ago
the block design of ad9371
Answered
over 2 years ago
Regarding modifying HDL reference file
Answered
over 3 years ago
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Not Answered
FPGA verilog code for LTM9011-14
0
0
views
0
replies
on May 20 2022
by
Brushless
Not Answered
What is standard assignment of JESD204B octets to lanes?
0
13
views
0
replies
on May 20 2022
by
Quant
Answered
JESD204B arbitrary lane selection
0
61
views
4
replies
on May 20 2022
by
svv9
Answered
JESD204B/C Link Transmit Peripheral ILAS settings
0
49
views
2
replies
on May 19 2022
by
svv9
Answered
FPGA
+1
106
views
4
replies
on May 19 2022
by
hax996
Not Answered
FIR Filter Example with Vivado 2021.1
0
33
views
1
reply
on May 18 2022
by
travisfcollins
Answered
System-level testbench for DAC-FMC-EBZ project produces error
0
97
views
5
replies
on May 18 2022
by
svv9
Answered
FMCDAQ2-EBZ + iW-RainboW-G35M
+1
373
views
10
replies
on May 18 2022
by
PaulPG
Not Answered
ADRV9026
0
28
views
0
replies
on May 17 2022
by
bringe
Not Answered
FMCOMMS8 and Clocks on the FMC Connector
0
45
views
1
reply
on May 16 2022
by
mhennerich
Not Answered
"ILA clock has stopped" error when trying to arm debug hab clocked by AD9361 l_clk
0
110
views
4
replies
on May 14 2022
by
Matt139
Answered
AD9081-FMCA-EBZ-A3 & VCK190 JESD Initialization
0
128
views
6
replies
on May 13 2022
by
travisfcollins
Suggested Answer
ZCU102 AD9176 on FMC1
0
110
views
4
replies
on May 13 2022
by
JasonS
Suggested Answer
older SD card images not available for download
0
37
views
1
reply
on May 13 2022
by
travisfcollins
Suggested Answer
Looking to purchase module similar to FMCDAQ2.
0
134
views
7
replies
on May 13 2022
by
lnagy
Not Answered
Problem running no-OS project ADRV9009 + ZCU102 [ Hello rx_clkgen: MMCM-PLL NOT locked (245760000 Hz) error: rx_clkgen: axi_clkgen_set_rate() failed Bye]
0
67
views
1
reply
on May 13 2022
by
Me_
Not Answered
How to use prbs debug tx dac jesd204b lane of adrv9009?
0
115
views
5
replies
on May 13 2022
by
lnagy
Answered
Processor Interrupt settings in TCL file
0
68
views
1
reply
on May 13 2022
by
andrei_g
Not Answered
VCU118 Interfacing with AD9172 chip (Hi-Tech Global ADC-DAC FMC Card)
0
113
views
6
replies
on May 12 2022
by
imoldovan
Answered
vlnv error in building hdl ref design
0
2984
views
4
replies
on May 12 2022
by
imoldovan
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