Building HDL library components in Vivado 2018.1 - crash

I attempted to build the HDL library components in 2018.1 (hdl_2018_r1 pre-release) but have found a potential bug with Vivado and the ipx::infer_bus_interface command, resulting in hard crashes.

Everything looks fine using 2017.4.1. I'm aware that 2018.1 isn't the targeted version. I just wanted to give anyone else thinking of trying 2018.1 a heads up. I've made a post on the Xilinx forums about the issue here: Vivado 2018.1 - Crash on ipx::infer_bus_interface - Community Forums