SerDes has revolutionized how we transport data at gigabit speeds with low pin count and has become the backbone of modern-day communication. GMSL is ADI’s SerDes implementation to transport video, control, and data.
We are no longer simply transmitting TTL voltage level signals with discrete clock and data signals. Instead, we are leveraging communication techniques to create a well-designed gigabit SerDes link transporting low-voltage logic levels over a distance that’s error-free and low-latency.
Clock and Data Recovery
One of the more fascinating aspects of high-speed SerDes is the ability to recover the clock from the bitstream. This means that we don’t need to send a discrete clock along with our data.
A simple experiment shows that this principle is demonstrated by randomly toggling a general-purpose input output (GPIO). The top capture is a random bitstream of ones and zeros, but turning on persistence and running for a while reveals a very clear periodic signal. This periodic signal capture on the bottom allows our eye to visually see the rate at which the GPIO toggles. With this clock information, we can now extract the data from our bitstream.
Figure 1: (Top) Capture of a Randomly Generated Bitstream, (Bottom) Persistence Capture Revealing the Embedded Data Rate
Obviously, the actual mechanism inside SerDes is much more complicated and leverages a phase-locked loop (PLL) to synthesize a clock from the bitstream, but this experiment shows the importance of the edge transitions for clearly extracting the clock information.
Encoding
The importance of these clock transitions is further reinforced by the line-encoding design. A popular line encoding scheme is 8b/10b (shortened from 8-bit/10-bit), which maps a set of 8 bits to a 10-bit code. GMSL2 and GMSL3 use 9b/10b encoding, which operates on the same principle but with lower overhead.
Encoding helps ensure sufficient edge transitions and maintains a neutral DC balance on the wire by monitoring the number of 1 and 0 symbols on the link using a method called running disparity. At high speeds, these symbols will charge and discharge the transmission line, causing the bitstream to wander.
Additionally, by knowing the current running disparity, the SerDes can output an encoded symbol to maintain neutral DC balance. This method also provides a mechanism for error detection if a received encoded symbol violates this rule. For GMSL, this would be considered a decoding error.
Lastly, encoding allows sending special control characters that enable the receiver to determine the start of a word boundary in a bitstream and align to the start of the data payload.
Figure 2: IBM’s US4486739A Patent Showing How 8-bit Words (ABCDEFGH) are Converted to 10-bit Codes (abcdefghj)
Scrambling
Like encoding, scrambling is a method for shuffling the data so that it appears random, but the scrambling procedure is known to allow the deserializer to unscramble it.
Scrambling further breaks up long runs of ones and zeros. It doesn’t provide the required mechanisms that line encoding does, specifically the word alignment. With proper knowledge of how data is encoded, a robust scrambler can be designed to complement the encoded stream and improve the link's DC balance.
Figure 3: The Scrambler Shifts the Bitstream In and Out with a Known Random Pattern
Equalization
Personally, equalization is one of my favorite aspects of SerDes and a feature that GMSL does very well. Specifically, GMSL has adaptive equalization (AEQ) that continuously runs with active traffic and adapts to the channel's changing characteristics.
Once the perfectly generated serial bitstream leaves the safety of the IC, it is subject to the intrinsic non-ideal conditions of the transmission channel, which consists of PCB traces, connectors, and cables. All these aspects can be counteracted with some creative equalization techniques on both the transmitter and receiver. For GMSL2 and GMSL3, the equalizer architecture makes GMSL links robust against noise, crosstalk, and reflections.
Most of the magic happens on the receiver, leveraging a method called decision feedback equalization. The GMSL receiver can leverage the nature of a bitstream, knowing the bits that came before, and tweak the coefficients to help cancel out the inter-symbol interference (ISI). There are other techniques used as well that will be covered in the future.
Looking at these techniques requires very high-end equipment, but thankfully, I stumbled across this amazing Python-based tool called PyBERT, which allows you to simulate a SerDes channel and show the impacts and benefits of a well-architected equalization scheme.
Figure 4: (Top Right) Simulates Noise on the Channel, (Bottom Right) Simulates Equalization Techniques to Significantly Recover the Signal from the Noise
Conclusion
SerDes is a unique blend of both analog and digital design techniques, and there is a LOT that goes into making a robust SerDes stream. To learn more, I highly encourage you to watch the following GMSLU course GMSL101A – What is a SerDes?, to further explore the inner workings.
Next month, we will explore the GMSL Channel Specification to help guarantee robustness of the GMSL link.
See all the blogs in the GMSL Debugging series.