Welcome to the final installment of my “Shockingly Good Protection” mini-series! So far, we’ve learned about the types of transient voltages and the damage they can do, some best practices for designing circuit protection, and a few common overvoltage protection components you can use when designing for electromagnetic compatibility (EMC). To wrap up the series, we’ll synthesize our learnings with a practical real-world example.
In this example, we’ll work to improve the transient protection on the ADM2867E (Figure 1). This is an integrated RS485E transceiver with two isolated sections in the IC, one for communications and one for power. The bus pins have integrated Level 4 IEC61000-4-2 electrostatic discharge (ESD) protection. This protection can be enhanced with external circuit protection when high levels of electrical fast transient (EFT) and surge performance are required.
Our goal in this example is to achieve the following levels of additional transient protection to meet EMC requirements across various end environment applications:
Level 2, ±1kV, IEC61000-4-5 Surge Immunity
Level 4, ±2 kV, IEC 62100-4-4 EFT
Figure 1. ADM2867E - Signal and Power Isolated RS-485 Transceiver with ±15 kV IEC 61000-4-2 ESD
As discussed in the second blog of the series, a hybrid network for circuit protection consists of a primary protection device, a secondary protection device, and a coordinating element (Figure 2). The primary element shunts most of the energy to ground, the secondary protection ensures that any residual energy does not damage the victim circuitry, and the coordinating element ensures they both work together.
In the case of ADM2867E, we are considering the secondary protection to be integrated into the device. This is the internal IEC 61000-4-2 ESD protection seen in Fig. 1. Next, we’ll add a primary overvoltage protector and a coordinating element, if necessary. This overvoltage protector will mainly protect against 1 kV surge voltages, as the ESD protection is internal to the device.
Figure 2. Hybrid network protection scheme
You may recall that EMC transient events vary in time, which means that successful EMC design relies on dynamic performance. This requires matching the dynamic characteristics of the protection components with the input/output stage of the protected device.
Component data sheets can’t always help you with this; they generally contain only DC data, which can be quite different from the dynamic breakdowns and I/V characteristics you need. Creating a circuit that meets EMC standards requires careful design, characterization, and understanding of the dynamic performance of the input/output stage of the protected device and its protection components.
Let’s work through an example to understand this dynamic performance.
Firstly, we need to ensure that the protection circuitry will match the device pin architecture. Matching a protection component to a victim circuit can be a tricky process. For example, the pin breakdown voltage of the victim circuitry may not be known. A good starting point is to check the max ratings table for the maximum voltages allowed on a pin. We can see in Figure 3 that the max ratings table for ADM2867E gives a max value of 14 V on a certain pin and a normal operating voltage of 12 V. In theory, this leaves only 2 V for the protection component to break down.
Figure 3. Absolute Max Ratings - ADM2867E (2020, Analog Devices)
But wait! Max ratings are normally a static DC test, and you’re trying to look at dynamic performance. If you have a curve tracer, it may be beneficial to curve trace the pin, as seen in Figure 4. Curve tracing the same pin showed the pin voltage remained high impedance up to 25 V, a very different figure from the max ratings. This is due to the internal architecture of the pin including ESD protection.
Figure 4. Curve Trace of Bus Pin – ADM2867E
Do be careful when supplementing max ratings with curve tracing measurements. This is not a production test and therefore may vary between production lots. However, in this case, the supplemental curve tracing implies that the pin breakdown is much higher than expected, allowing for a protection device with a higher breakdown window. That will make it much easier to select a protection component.
In the third blog of this series, we discussed the critical performance voltages you must be aware of when using overvoltage protectors. The end solution we are considering here uses two Bourns CDSOT23-SM712, a single component with two integrated transient voltage suppression (TVS) diodes, to protect the two sets of bus pins, along with coordinating resistor elements as shown in Figure 5.
Figure 5. Protection components with simplified diagram of ADM2867E
It is important to ensure that the breakdown voltage of the TVS is outside the normal operating range of the pins it protects. As shown in the characteristic curve (Figure 6), the unique feature of the SM712 is that it has asymmetrical breakdown voltages of +13.3 V and –7.5 V. This asymmetry makes SM712 ideal for matching a typical RS485 transceiver with common-mode range of +12 V to –7 V, therefore providing optimum protection while minimizing overvoltage stresses on the ADM2867E RS-485 transceiver.
Figure 6. Bourns CDSOT23-SM712 I/V Characteristic Curve
Remember, the TVS clamping voltage will vary depending on the level of current it shunts to ground due to internal resistance of the TVS. Therefore, the Vclamp in the data sheet might not be applicable for your required transient current, and it may be beneficial to surge test a standalone component. This will allow you to see the max voltage of the TVS clamps for that particular surge current/voltage.
Figure 7. Oscilloscope Plot of Surge Testing a CDSOT23-SM712
In Figure 7, the selected TVS was stressed with a 1 kV surge pulse. The highest voltage recorded was 22 V, so this is the max voltage on the TVS for that particular surge current. Because this value remains below the 25 V breakdown of the victim pin, we can conclude that this TVS is a good solution for a 1 kV surge, but of course this should be characterized in the lab.
Recall that the secondary protection is contained within the RS485 transceiver via internal IEC 61000-4-2 ESD protection. Next, a coordinating resistor is needed between the ADM2867E integrated protection circuitry and SM712. This example uses 10 Ohm pulse proof resistors. Pulse proofs are immune to transients while offering hybrid network device coordination.
It is best practice to ensure that protection circuits do not interfere with the normal operation of the system. In this case, adding the 10 Ohm resistors in series will reduce output differential voltage (Vod) on the RS485 bus pins, so ensure you have sufficient margin for reliable communications.
Our transient protection circuit for ADM2867E achieved or exceeded the IEC61000-4-x standard test levels we set at the start of this blog. The results are shown in Figure 8. For an example of the test setup used for surge testing, see Figure 9.
|
IEC Specification |
Level |
Voltage |
|
IEC61000-4-2 ESD |
Level 4 |
±8 kV Contact Discharge ±15 kV Air Discharge |
|
IEC6100-4-4 EFT |
>> Level 4 |
±4 kV |
|
IEC61000-4-5 Surge Immunity |
Level 2 |
±1 kV |
Figure 8. Enhanced ADM2867E Transient Protection Performance
Figure 9. Diagram of full system surge test setup with coupling/decoupling network (CDN)
There are many types of circuit protection components on the market. Picking the right protection circuit and components depends on a number of factors, including end application, PCB space constraints, type of transient protection needed, and the victim pin structure and parameters.
Picking the right circuit protection may involve some lab work to determine the best fit. When considering deployment of complementing protection devices in the same circuit, it is very important to design and test at a number of energy levels. Fantastic protection can be achieved at 4kV, but product destruction can be observed at 2kV because of the dynamic nature of these devices and the critical times each are activated.
Finally, I would be remiss not to highlight the importance of PCB layout in effective transient protection. This includes optimum placement of protection components and tracing and routing. If you’d like to learn more about designing transient protection, see below for some additional worked examples. Thanks for coming along on the “Shockingly Good Protection” blog series! Please subscribe to see which EMC topic we’ll explore next.
Detailed example of a hybrid circuit protection circuit for an alternative RS485 device, ADM3485E. In this case there is not IEC61000-4-2 ESD internal to the device. This example uses external protection components to achieve high levels of ESD and Eft protection, with multiple levels of Surge protection depending on space, cost and protection levels required.
https://www.analog.com/media/en/technical-documentation/application-notes/an-1161.pdf
Detailed description of various surge protection circuits for CAN transceivers ADM3055E and ADM3057E. the different circuits depend on your surge voltage requirement and bus pins system rated voltage.
https://www.analog.com/media/en/technical-documentation/app-notes/an-2501.pdf
References
Analog Devices (2018) Data Sheet ADM2867E/ADM2865E/ADM2863E/ADM2861E Available at:https://www.analog.com/media/en/technical-documentation/data-sheets/adm2867e_adm2865e_adm2863e_adm2861e.pdf [Accessed: March 15, 2024].
