In this post, I will introduce a method called “Open the Loop,” aka BigL/BigC, which offers some improvements over the previously discussed “Split the Circuit” method.
Remember our Unstable Example
Recall the unstable example that was introduced in the first blog post and was analyzed using the “Split the Circuit” method in the second blog post.
Figure 1: Transient Simulation of an Excessively Ringy and Unstable Inverting Amplifier
Implementation
Starting with our original circuit, we need to make a few changes to implement the BigL/BigC method. First, replace your signal source with a ground; since we are plotting loop gain, we don’t need the input signal.
Next, we’ll add the large inductor and capacitor components, along with a voltage source to inject a signal at the input of the feedback network.
Figure 2: Using BigL/BigC Method to Plot Loop Gain in LTspice
Download the zip file to follow along; be sure to unzip before opening in LTspice.
Why it Works
Looking at Figure 2 (and the schematic file Open the Loop – BigL-BigC.asc), Cbig combined with V1 serves as the method for injecting a voltage into the loop. In DC simulations, Cbig appears as an open circuit and removes the source from the initial DC bias results. In AC simulations, the opposite is true: the signal source is directly connected to the feedback network, since Cbig appears as a short. These components allow you to inject a voltage during the AC simulation, while ensuring that the op amp biases properly during the initial DC bias simulation.
Lbig is also an important element for ensuring the op amp is properly biased. At DC, the loop is closed by Lbig to allow the op amp to bias properly, and at AC, the loop is opened so that we can simulate the response of the path through the feedback network (β) and through the open-loop op amp (A) to plot Aβ.
Beware: Where You Break the Loop Matters
Be sure to connect the voltage injection components at a location in the loop where a very low output impedance is driving a very high input impedance. For amplifier circuits, the amplifier output serves as this low-impedance output.
Also, notice that the BigL/BigC elements are not placed between the op amp output and Rl in Figure 2. It is critical that loading elements remain connected to the op amp and are not isolated through the large inductor.
Location in the loop will impact the results you get. If in doubt, compare your loop gain and phase margin results to the circuit behavior in the transient simulation; instability in the loop gain plot should look like instability in response to a sudden perturbation in the time domain.
Beware: Large L and C Can Cause Issues
Using large L and C values to selectively open and close the circuit for AC and DC sims is a clever trick but can cause issues with some simulations. Another option in LTspice is to use resistors with AC values. CTRL-right click on the resistor to bring up the Component Attribute Editor and add an AC= value to the Value2 field. See Figures 3 and 4, and the example schematic file Open the Loop – Large Resistors.asc.
Figure 3: Using Resistors with AC Values instead of Large Inductor and Capacitor
Figure 4: Adding AC Value to Resistor in Component Attribute Editor
Beware: You Might Need a Replica Circuit
This method is popular because it is simple to implement, but opening the loop in the AC simulation introduces the potential for error in the simulated loop gain curve. The input of the feedback network is disconnected from the output of the amplifier during AC simulation; if the loading of the feedback network on the op amp has any impact on the loop gain, your simulation might not reflect that.
That said, I have tried to “break” this method with tricky circuits to expose this shortcoming and have not (yet) identified an amplifier circuit that illustrates this issue.
In future posts, I will discuss other methods that eliminate the concern around opening the loop. Stay tuned!
Example with Fully Differential Amplifier
BigL/BigC can be easily implemented on fully differential amplifiers as well. Figure 5 (and example schematic file Diff Amp Transient.asc) shows the transient simulation of a marginally stable example using the ADA4932.
Figure 5: Transient Simulation of a Marginally Stable FDA Circuit
We can implement BigL/BigC for this example. We just need to do so in a differential manner. See Figure 6 (and example schematic file Open the Loop – Diff Amp.asc).
Figure 6: Plotting Loop Gain for a Marginally Stable FDA Circuit
Both loops need to be broken in the AC analysis by large inductors (Lbig1 and Lbig2), and an input signal can be applied differentially to the feedback network by a pair of large capacitors (Cbig1 and Cbig2). Loop gain and phase margin can be analyzed by plotting V(Abeta+,Abeta-), which is the differential voltage across the nodes Abeta+ and Abeta-. We can use the cursors to determine that the phase margin is 180° - 134° = 46°.
Now you understand the theory behind stability analysis and have some techniques for using LTspice to explore stability in your own circuits. Stay tuned for more analysis techniques that will give you an even deeper understanding of how to leverage LTspice to create more robust circuit designs.
Check out this resource in the Precision Technology Signals Chain Library.
Read all the blogs in the LTspice Amplifier Stability series.
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in reply to RamonHM