Close-up of electronic parts on a printed circuit board

Increase Switch Channel Density with Advanced Packaging and Route Through Pins

Step into the realm of innovation where a single switch is set to revolutionize the challenges faced in printed circuit board (PCB) design and electronic measurement systems that require high channel density and precision. This isn’t just a breakthrough; it’s the dawn of a new era where precision meets efficiency, and space constraints are no longer a barrier to creativity.

The core innovation of this switch lies in its unique integration of passive components and independently controlled switches with a Serial Peripheral Interface (SPI). By incorporating resistors and capacitors directly into the switch package, designers can achieve unprecedented space-saving benefits. This design architecture results in a remarkable reduction of up to 80% in board area, making it an ideal solution for applications where space limitations are a critical concern.

The "Route Through Pins" feature offers a game-changing solution for PCB designers. By enabling efficient routing of SPI and power supply traces directly through the switch, this feature eliminates the need for additional vias or complex routing configurations. This simplification not only reduces design complexity but also leads to substantial improvements in switch channel density, enabling the creation of more compact and high-performance designs.

In addition to its space-saving attributes, this switch has very low switch resistance of approximately 0.5Ω. This characteristic is crucial for improving measurement accuracy and minimizing heat generation when handling high currents. By reducing switch resistance, it provides superior signal integrity and precision in a wide range of applications, including automated test equipment and precision measurement and control systems. Furthermore, the low switch resistance improves thermal resistance, ensuring reliable and consistent performance even in varying environmental conditions.  

Challenges When Maximizing Channel Count 

When designing a system with the goal of maximizing channel count, board space becomes a valuable resource. Switches play a crucial role in increasing channel count in a system, but as the number of switches grows, board space is not only occupied by the switches themselves, but also by the logic control lines and associated passive components required for correct operation. Consequently, the achievable channel count is compromised due to the space taken up by these additional components needed to control the switches. 

Traditional Switch Solution 

One commonly employed solution to enhance channel density is to use switches controlled by an SPI logic interface, such as the ADG1414, an octal SPI switch. This architecture offers a significant advantage over a parallel interface, as it only requires four GPIO lines for implementation and utilizes just one SPI port of a standard microcontroller. For systems containing numerous switches, the daisy-chain feature available on this device can be used to control all the devices simultaneously. Figure 1 illustrates an example where twenty-five ADG1414 devices configured in daisy-chain mode control 200 LEDs. In addition, three decoupling capacitors and one pullup resistor are required for proper operation. This implementation requires the placement of 125 components, occupying a board area of approximately 2600 mm2. 

  PCB layout example showing 25 x ADG1414 devices

Figure 1. PCB layout example showing 25 x ADG1414 devices. 

Advanced Packaging 

By integrating passive components directly into the switch package as shown in Figure 2, designers can achieve unparalleled space-saving benefits. The ADGS2414D has integrated decoupling capacitors for the VDD, VSS, and RESET/VL power supply pins. Therefore, the need for external decoupling capacitors is eliminated. The pullup resistor for the SDO pin is also integrated. Combined with multi-die stacking of the switch circuitry, the total system footprint of this switch is significantly reduced and available in a 4 mm × 5 mm LGA package. 

  ADI’s innovative stacked triple-die solution

Figure 2. ADI’s innovative stacked triple-die solution. 

Route Through Pins 

When multiple devices are used in a system, the route through pins feature allows for a more compact layout with increased channel density. This feature facilitates the seamless passage of power supplies and digital lines between devices. The VDD, RESET/VL, and GND power lines, as well as the SCLK, CS, SDI, and SDO digital lines, are available on both the top and bottom pins of the package. These route through pins simplify PCB routing and reduce the need for vias when connecting multiple devices together. Figure 3 shows an example PCB layout where the route through pins on four ADGS2414D devices configured in daisy-chain mode are used to minimize the overall size of the layout. Combined with the integrated passive components, the total PCB area of the design can be significantly reduced. 

  PCB layout example using of the Route Through Pins

Figure 3. PCB layout example using of the Route Through Pins. 

ADI Switch Solution 

As mentioned earlier, a common switch solution shown in Figure 1 requires the placement of 125 components occupying a board area of approximately 2600 mm2. With the innovative co-packaging of passive components and the route through pins feature of the octal switch, a new PCB design with significantly higher density becomes achievable. Figure 4 showcases the same scenario of 200 LEDs controlled by twenty-five ADGS2414D switches. Again, the daisy-chain feature can be used to control all the devices simultaneously. Notably, the layout lacks passive components, allowing the switches to be placed in close proximity with a typical spacing of 1 mm between each device on both sides. This design requires the placement of only 25 devices requiring a board area of approximately 800 mm2, resulting in a 70% reduction in board area. In addition to the board area savings, there is a reduction of 100 passive components, leading to a significant cost savings in manufacturing, as well as improvements in product quality and reliability.  

  PCB layout example showing 25 x ADGS2414D devices

Figure 4. PCB layout example showing 25 x ADGS2414D devices. 

Low Switch Resistance 

In addition to its space-saving benefits, the ADGS2414D boasts an impressively low switch on resistance of typically 0.5Ω. This low resistance minimizes voltage drops (I x R) within a measurement signal chain, resulting in enhanced overall accuracy at the system level. In applications with high channel density, improved accuracy translates to reduced channel-to-channel variation and fewer calibration cycles, leading to cost savings and increased product test yield. 

This switch can handle significantly higher switching currents, with a specification of up to 850 mA per channel. This capability is particularly valuable when dealing with high current switching scenarios. However, it’s important to manage the heat generated by power loss in the switch, especially in high channel density applications where thermal management can be a challenge. Once again, the low switch on resistance plays a crucial role in reducing power loss (I2 × R) as heat. This feature ensures temperature stability within the system and helps prevent overheating issues. 

Daisy-Chain Mode 

The ADGS2414D supports the connection of multiple devices in a daisy-chain configuration, as shown in Figure 5. In this setup, all devices share the same CS, SCLK, and VL lines. The SDO of one device forms a connection to the SDI of the next device, creating a shift register. One single 16-bit SPI frame is used to command all the devices in the chain to enter daisy-chain mode. In this mode, SDO is an 8-cycle delayed version of SDI, so the desired switch configuration can be passed from one device to the next device in the chain. 

  Two ADGS2414D devices in a daisy-chain configuration

Figure 5. Two ADGS2414D devices in a daisy-chain configuration. 

Error Detection Function 

Protocol and communication errors on the SPI are detectable. There are three error detection features: incorrect SCLK count error detection, invalid read/write address error detection, and CRC error detection. Each of these error detection features can be enabled or disabled using corresponding enable bits in the error configuration register. In addition, there is an error flag bit in the error flags register for each of these error detection features. 

Summary 

The ADGS2414D offers a groundbreaking solution in PCB design and electronic measurement technology. Its innovative co-packaging of passive components, the "Route Through Pins" feature, SPI interface, and low switch resistance contribute to significant reductions in board area, increased channel density, and improved measurement accuracy. The same industry-leading switch performance seen in Analog Devices’ current switch offerings is maintained due to the multi-die packaging used. With the introduction of this device, a new innovative precision switch solution is presented that enables a significant increase in switch channel density. 

Do you have any questions about ADGS2414D? Visit the https://ez.analog.com/switches_multiplexers/